| Message ID | 1398313031-14848-1-git-send-email-arun.kk@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 04/24/2014 09:47 AM, Arun Kumar K wrote: > Adds the google peach-pit board dts file which uses > exynos5420 SoC. > > Signed-off-by: Arun Kumar K <arun.kk@samsung.com> > Signed-off-by: Doug Anderson <dianders@chromium.org> Looks good. Reviewed-by: Tushar Behera <tushar.behera@linaro.org> > --- > Changes from v1 > --------------- > - Addressed review comments from Doug, Sachin & Tushar > - Removed adc and lid-switch nodes > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/exynos5420-peach-pit.dts | 182 ++++++++++++++++++++++++++++ > 2 files changed, 183 insertions(+) > create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 35c146f..3220e29 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ > exynos5250-smdk5250.dtb \ > exynos5250-snow.dtb \ > exynos5420-arndale-octa.dtb \ > + exynos5420-peach-pit.dtb \ > exynos5420-smdk5420.dtb \ > exynos5440-sd5v1.dtb \ > exynos5440-ssdk5440.dtb > diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts > new file mode 100644 > index 0000000..fbb0469 > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts > @@ -0,0 +1,182 @@ > +/* > + * Google Peach Pit Rev 6+ board device tree source > + * > + * Copyright (c) 2014 Google, Inc > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +/dts-v1/; > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/gpio/gpio.h> > +#include "exynos5420.dtsi" > + > +/ { > + model = "Google Peach Pit Rev 6+"; > + > + compatible = "google,pit-rev16", > + "google,pit-rev15", "google,pit-rev14", > + "google,pit-rev13", "google,pit-rev12", > + "google,pit-rev11", "google,pit-rev10", > + "google,pit-rev9", "google,pit-rev8", > + "google,pit-rev7", "google,pit-rev6", > + "google,pit", "google,peach","samsung,exynos5420", > + "samsung,exynos5"; > + > + memory { > + reg = <0x20000000 0x80000000>; > + }; > + > + fixed-rate-clocks { > + oscclk { > + compatible = "samsung,exynos5420-oscclk"; > + clock-frequency = <24000000>; > + }; > + }; > + > + pinctrl@13400000 { > + tpm_irq: tpm-irq { > + samsung,pins = "gpx1-0"; > + samsung,pin-function = <0>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + power_key_irq: power-key-irq { > + samsung,pins = "gpx1-2"; > + samsung,pin-function = <0>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + }; > + > + pinctrl@14010000 { > + spi_flash_cs: spi-flash-cs { > + samsung,pins = "gpa2-5"; > + samsung,pin-function = <1>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <3>; > + }; > + > + backlight_pwm: backlight-pwm { > + samsung,pins = "gpb2-0"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&power_key_irq>; > + > + power { > + label = "Power"; > + gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; > + linux,code = <KEY_POWER>; > + gpio-key,wakeup; > + }; > + }; > + > + rtc@101E0000 { > + status = "okay"; > + }; > + > + serial@12C30000 { > + status = "okay"; > + }; > + > + mmc@12200000 { > + status = "okay"; > + num-slots = <1>; > + broken-cd; > + caps2-mmc-hs200-1_8v; > + supports-highspeed; > + non-removable; > + card-detect-delay = <200>; > + clock-frequency = <400000000>; > + samsung,dw-mshc-ciu-div = <3>; > + samsung,dw-mshc-sdr-timing = <0 4>; > + samsung,dw-mshc-ddr-timing = <0 2>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; > + > + slot@0 { > + reg = <0>; > + bus-width = <8>; > + }; > + }; > + > + mmc@12220000 { > + status = "okay"; > + num-slots = <1>; > + supports-highspeed; > + card-detect-delay = <200>; > + clock-frequency = <400000000>; > + samsung,dw-mshc-ciu-div = <3>; > + samsung,dw-mshc-sdr-timing = <2 3>; > + samsung,dw-mshc-ddr-timing = <1 2>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; > + > + slot@0 { > + reg = <0>; > + bus-width = <4>; > + }; > + }; > + > + i2c@12E10000 { > + status = "okay"; > + clock-frequency = <400000>; > + > + tpm@20 { > + /* Unused irq; but still need to configure the pins */ > + pinctrl-names = "default"; > + pinctrl-0 = <&tpm_irq>; > + > + compatible = "infineon,slb9645tt"; > + reg = <0x20>; > + }; > + }; > + > + spi@12d30000 { > + status = "okay"; > + samsung,spi-src-clk = <0>; > + num-cs = <1>; > + > + spidev@0 { > + compatible = "spidev"; > + reg = <0>; > + spi-max-frequency = <50000000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&spi_flash_cs>; > + > + controller-data { > + cs-gpio = <&gpa2 5 0>; > + samsung,spi-feedback-delay = <2>; > + }; > + }; > + }; > + > + backlight { > + compatible = "pwm-backlight"; > + pwms = <&pwm 0 1000000 0>; > + brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; > + default-brightness-level = <7>; > + pinctrl-0 = <&backlight_pwm>; > + pinctrl-names = "default"; > + }; > + > + /* > + * Use longest HW watchdog in SoC (32 seconds) since the hardware > + * watchdog provides no debugging information (compared to soft/hard > + * lockup detectors) and so should be last resort. > + */ > + watchdog@101D0000 { > + timeout-sec = <32>; > + }; > +}; >
Arun, On Wed, Apr 23, 2014 at 9:17 PM, Arun Kumar K <arun.kk@samsung.com> wrote: > Adds the google peach-pit board dts file which uses > exynos5420 SoC. > > Signed-off-by: Arun Kumar K <arun.kk@samsung.com> > Signed-off-by: Doug Anderson <dianders@chromium.org> > --- > Changes from v1 > --------------- > - Addressed review comments from Doug, Sachin & Tushar > - Removed adc and lid-switch nodes > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/exynos5420-peach-pit.dts | 182 ++++++++++++++++++++++++++++ > 2 files changed, 183 insertions(+) > + spi@12d30000 { > + status = "okay"; > + samsung,spi-src-clk = <0>; > + num-cs = <1>; > + > + spidev@0 { > + compatible = "spidev"; > + reg = <0>; > + spi-max-frequency = <50000000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&spi_flash_cs>; > + > + controller-data { > + cs-gpio = <&gpa2 5 0>; Technically this could be cs-gpio = <&gpa2 5 GPIO_ACTIVE_HIGH>; ...but I don't think that's a huge deal... Reviewed-by: Doug Anderson <dianders@chromium.org> -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Thanks Doug & Tushar for the Reviewed-by. On Fri, Apr 25, 2014 at 12:27 AM, Doug Anderson <dianders@chromium.org> wrote: > Arun, > > On Wed, Apr 23, 2014 at 9:17 PM, Arun Kumar K <arun.kk@samsung.com> wrote: >> Adds the google peach-pit board dts file which uses >> exynos5420 SoC. >> >> Signed-off-by: Arun Kumar K <arun.kk@samsung.com> >> Signed-off-by: Doug Anderson <dianders@chromium.org> >> --- >> Changes from v1 >> --------------- >> - Addressed review comments from Doug, Sachin & Tushar >> - Removed adc and lid-switch nodes >> --- >> arch/arm/boot/dts/Makefile | 1 + >> arch/arm/boot/dts/exynos5420-peach-pit.dts | 182 ++++++++++++++++++++++++++++ >> 2 files changed, 183 insertions(+) >> + spi@12d30000 { >> + status = "okay"; >> + samsung,spi-src-clk = <0>; >> + num-cs = <1>; >> + >> + spidev@0 { >> + compatible = "spidev"; >> + reg = <0>; >> + spi-max-frequency = <50000000>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&spi_flash_cs>; >> + >> + controller-data { >> + cs-gpio = <&gpa2 5 0>; > > Technically this could be > > cs-gpio = <&gpa2 5 GPIO_ACTIVE_HIGH>; > > ...but I don't think that's a huge deal... > Kukjin, please let me know if I need to re-send this or can you take care while applying? Regards Arun > Reviewed-by: Doug Anderson <dianders@chromium.org> -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Arun Kumar K wrote: > > Thanks Doug & Tushar for the Reviewed-by. > > On Fri, Apr 25, 2014 at 12:27 AM, Doug Anderson <dianders@chromium.org> > wrote: > > Arun, > > > > On Wed, Apr 23, 2014 at 9:17 PM, Arun Kumar K <arun.kk@samsung.com> > wrote: > >> Adds the google peach-pit board dts file which uses > >> exynos5420 SoC. > >> > >> Signed-off-by: Arun Kumar K <arun.kk@samsung.com> > >> Signed-off-by: Doug Anderson <dianders@chromium.org> > >> --- > >> Changes from v1 > >> --------------- > >> - Addressed review comments from Doug, Sachin & Tushar > >> - Removed adc and lid-switch nodes > >> --- > >> arch/arm/boot/dts/Makefile | 1 + > >> arch/arm/boot/dts/exynos5420-peach-pit.dts | 182 > ++++++++++++++++++++++++++++ > >> 2 files changed, 183 insertions(+) > >> + spi@12d30000 { > >> + status = "okay"; > >> + samsung,spi-src-clk = <0>; > >> + num-cs = <1>; > >> + > >> + spidev@0 { > >> + compatible = "spidev"; > >> + reg = <0>; > >> + spi-max-frequency = <50000000>; > >> + pinctrl-names = "default"; > >> + pinctrl-0 = <&spi_flash_cs>; > >> + > >> + controller-data { > >> + cs-gpio = <&gpa2 5 0>; > > > > Technically this could be > > > > cs-gpio = <&gpa2 5 GPIO_ACTIVE_HIGH>; > > > > ...but I don't think that's a huge deal... > > > > Kukjin, please let me know if I need to re-send this or can you take > care while applying? > Arun, can you please re-spin with tag of reviewed-by? Thanks, Kukjin > > > Reviewed-by: Doug Anderson <dianders@chromium.org> -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Arun, On 24.04.2014 06:17, Arun Kumar K wrote: > Adds the google peach-pit board dts file which uses > exynos5420 SoC. > > Signed-off-by: Arun Kumar K <arun.kk@samsung.com> > Signed-off-by: Doug Anderson <dianders@chromium.org> > --- > Changes from v1 > --------------- > - Addressed review comments from Doug, Sachin & Tushar > - Removed adc and lid-switch nodes > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/exynos5420-peach-pit.dts | 182 ++++++++++++++++++++++++++++ > 2 files changed, 183 insertions(+) > create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 35c146f..3220e29 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ > exynos5250-smdk5250.dtb \ > exynos5250-snow.dtb \ > exynos5420-arndale-octa.dtb \ > + exynos5420-peach-pit.dtb \ > exynos5420-smdk5420.dtb \ > exynos5440-sd5v1.dtb \ > exynos5440-ssdk5440.dtb > diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts > new file mode 100644 > index 0000000..fbb0469 > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts > @@ -0,0 +1,182 @@ > +/* > + * Google Peach Pit Rev 6+ board device tree source > + * > + * Copyright (c) 2014 Google, Inc > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +/dts-v1/; > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/gpio/gpio.h> > +#include "exynos5420.dtsi" > + > +/ { > + model = "Google Peach Pit Rev 6+"; > + > + compatible = "google,pit-rev16", > + "google,pit-rev15", "google,pit-rev14", > + "google,pit-rev13", "google,pit-rev12", > + "google,pit-rev11", "google,pit-rev10", > + "google,pit-rev9", "google,pit-rev8", > + "google,pit-rev7", "google,pit-rev6", > + "google,pit", "google,peach","samsung,exynos5420", > + "samsung,exynos5"; Do you really need so many compatible strings here? Furthermore, are all the newer revisions really fully backwards compatible with older ones? Also, do you have a way to check the revision in hardware, e.g. by some GPIO pins? If so, I don't think there would be any need to revision number as a part of compatible string. > + > + memory { > + reg = <0x20000000 0x80000000>; > + }; > + > + fixed-rate-clocks { > + oscclk { > + compatible = "samsung,exynos5420-oscclk"; > + clock-frequency = <24000000>; > + }; > + }; > + > + pinctrl@13400000 { Please convert this dts file into reference-based syntax. It has multiple advantages over the legacy way of replicating full paths every time a node needs to be updated. You can see other dts files for examples how this can be used, e.g. s3c64*.dts* (for a quite simple setup), imx6*.dts* (for more complex things), etc. > + tpm_irq: tpm-irq { > + samsung,pins = "gpx1-0"; > + samsung,pin-function = <0>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + > + power_key_irq: power-key-irq { > + samsung,pins = "gpx1-2"; > + samsung,pin-function = <0>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + }; > + > + pinctrl@14010000 { > + spi_flash_cs: spi-flash-cs { > + samsung,pins = "gpa2-5"; > + samsung,pin-function = <1>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <3>; > + }; > + > + backlight_pwm: backlight-pwm { > + samsung,pins = "gpb2-0"; > + samsung,pin-function = <2>; > + samsung,pin-pud = <0>; > + samsung,pin-drv = <0>; > + }; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&power_key_irq>; > + > + power { > + label = "Power"; > + gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; > + linux,code = <KEY_POWER>; > + gpio-key,wakeup; > + }; > + }; > + > + rtc@101E0000 { > + status = "okay"; > + }; > + > + serial@12C30000 { > + status = "okay"; > + }; > + > + mmc@12200000 { > + status = "okay"; > + num-slots = <1>; > + broken-cd; > + caps2-mmc-hs200-1_8v; > + supports-highspeed; > + non-removable; > + card-detect-delay = <200>; > + clock-frequency = <400000000>; > + samsung,dw-mshc-ciu-div = <3>; > + samsung,dw-mshc-sdr-timing = <0 4>; > + samsung,dw-mshc-ddr-timing = <0 2>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; > + > + slot@0 { > + reg = <0>; > + bus-width = <8>; > + }; > + }; > + > + mmc@12220000 { > + status = "okay"; > + num-slots = <1>; > + supports-highspeed; > + card-detect-delay = <200>; > + clock-frequency = <400000000>; > + samsung,dw-mshc-ciu-div = <3>; > + samsung,dw-mshc-sdr-timing = <2 3>; > + samsung,dw-mshc-ddr-timing = <1 2>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; > + > + slot@0 { > + reg = <0>; > + bus-width = <4>; > + }; > + }; > + > + i2c@12E10000 { > + status = "okay"; > + clock-frequency = <400000>; > + > + tpm@20 { > + /* Unused irq; but still need to configure the pins */ > + pinctrl-names = "default"; > + pinctrl-0 = <&tpm_irq>; nit: Please move the pinctrl properties below compatible and reg, as this is more readable and consistent with other nodes. > + > + compatible = "infineon,slb9645tt"; > + reg = <0x20>; > + }; > + }; > + > + spi@12d30000 { > + status = "okay"; > + samsung,spi-src-clk = <0>; > + num-cs = <1>; > + > + spidev@0 { > + compatible = "spidev"; > + reg = <0>; > + spi-max-frequency = <50000000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&spi_flash_cs>; > + > + controller-data { > + cs-gpio = <&gpa2 5 0>; > + samsung,spi-feedback-delay = <2>; > + }; Hmm, is this really a physical device? Shouldn't this have some kind of real compatible string first? Also I'm not even sure if "spidev" is supposed to be used like this, especially considering that this compatible string isn't even documented in Documentation/devicetree/bindings. (Rob, Mark, Grant, any opinions on this?) Best regards, Tomasz -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Tomasz, On Sat, Apr 26, 2014 at 5:02 PM, Tomasz Figa <tomasz.figa@gmail.com> wrote: > Hi Arun, > > > On 24.04.2014 06:17, Arun Kumar K wrote: >> >> Adds the google peach-pit board dts file which uses >> exynos5420 SoC. >> >> Signed-off-by: Arun Kumar K <arun.kk@samsung.com> >> Signed-off-by: Doug Anderson <dianders@chromium.org> >> --- >> Changes from v1 >> --------------- >> - Addressed review comments from Doug, Sachin & Tushar >> - Removed adc and lid-switch nodes >> --- >> arch/arm/boot/dts/Makefile | 1 + >> arch/arm/boot/dts/exynos5420-peach-pit.dts | 182 >> ++++++++++++++++++++++++++++ >> 2 files changed, 183 insertions(+) >> create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts >> >> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile >> index 35c146f..3220e29 100644 >> --- a/arch/arm/boot/dts/Makefile >> +++ b/arch/arm/boot/dts/Makefile >> @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ >> exynos5250-smdk5250.dtb \ >> exynos5250-snow.dtb \ >> exynos5420-arndale-octa.dtb \ >> + exynos5420-peach-pit.dtb \ >> exynos5420-smdk5420.dtb \ >> exynos5440-sd5v1.dtb \ >> exynos5440-ssdk5440.dtb >> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts >> b/arch/arm/boot/dts/exynos5420-peach-pit.dts >> new file mode 100644 >> index 0000000..fbb0469 >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts >> @@ -0,0 +1,182 @@ >> +/* >> + * Google Peach Pit Rev 6+ board device tree source >> + * >> + * Copyright (c) 2014 Google, Inc >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + */ >> + >> +/dts-v1/; >> +#include <dt-bindings/input/input.h> >> +#include <dt-bindings/gpio/gpio.h> >> +#include "exynos5420.dtsi" >> + >> +/ { >> + model = "Google Peach Pit Rev 6+"; >> + >> + compatible = "google,pit-rev16", >> + "google,pit-rev15", "google,pit-rev14", >> + "google,pit-rev13", "google,pit-rev12", >> + "google,pit-rev11", "google,pit-rev10", >> + "google,pit-rev9", "google,pit-rev8", >> + "google,pit-rev7", "google,pit-rev6", >> + "google,pit", "google,peach","samsung,exynos5420", >> + "samsung,exynos5"; > > > Do you really need so many compatible strings here? Furthermore, are all the > newer revisions really fully backwards compatible with older ones? > AFAIK, these multiple board revisions exist and are backwards compatible. > Also, do you have a way to check the revision in hardware, e.g. by some GPIO > pins? If so, I don't think there would be any need to revision number as a > part of compatible string. > I am not very sure about that. Doug, Can you give some clarity on this? > >> + >> + memory { >> + reg = <0x20000000 0x80000000>; >> + }; >> + >> + fixed-rate-clocks { >> + oscclk { >> + compatible = "samsung,exynos5420-oscclk"; >> + clock-frequency = <24000000>; >> + }; >> + }; >> + >> + pinctrl@13400000 { > > > Please convert this dts file into reference-based syntax. It has multiple > advantages over the legacy way of replicating full paths every time a node > needs to be updated. > Ok will change it to reference-based. > You can see other dts files for examples how this can be used, e.g. > s3c64*.dts* (for a quite simple setup), imx6*.dts* (for more complex > things), etc. > > >> + tpm_irq: tpm-irq { >> + samsung,pins = "gpx1-0"; >> + samsung,pin-function = <0>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + power_key_irq: power-key-irq { >> + samsung,pins = "gpx1-2"; >> + samsung,pin-function = <0>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + }; >> + >> + pinctrl@14010000 { >> + spi_flash_cs: spi-flash-cs { >> + samsung,pins = "gpa2-5"; >> + samsung,pin-function = <1>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + backlight_pwm: backlight-pwm { >> + samsung,pins = "gpb2-0"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + }; >> + >> + gpio-keys { >> + compatible = "gpio-keys"; >> + >> + pinctrl-names = "default"; >> + pinctrl-0 = <&power_key_irq>; >> + >> + power { >> + label = "Power"; >> + gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; >> + linux,code = <KEY_POWER>; >> + gpio-key,wakeup; >> + }; >> + }; >> + >> + rtc@101E0000 { >> + status = "okay"; >> + }; >> + >> + serial@12C30000 { >> + status = "okay"; >> + }; >> + >> + mmc@12200000 { >> + status = "okay"; >> + num-slots = <1>; >> + broken-cd; >> + caps2-mmc-hs200-1_8v; >> + supports-highspeed; >> + non-removable; >> + card-detect-delay = <200>; >> + clock-frequency = <400000000>; >> + samsung,dw-mshc-ciu-div = <3>; >> + samsung,dw-mshc-sdr-timing = <0 4>; >> + samsung,dw-mshc-ddr-timing = <0 2>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; >> + >> + slot@0 { >> + reg = <0>; >> + bus-width = <8>; >> + }; >> + }; >> + >> + mmc@12220000 { >> + status = "okay"; >> + num-slots = <1>; >> + supports-highspeed; >> + card-detect-delay = <200>; >> + clock-frequency = <400000000>; >> + samsung,dw-mshc-ciu-div = <3>; >> + samsung,dw-mshc-sdr-timing = <2 3>; >> + samsung,dw-mshc-ddr-timing = <1 2>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; >> + >> + slot@0 { >> + reg = <0>; >> + bus-width = <4>; >> + }; >> + }; >> + >> + i2c@12E10000 { >> + status = "okay"; >> + clock-frequency = <400000>; >> + >> + tpm@20 { >> + /* Unused irq; but still need to configure the >> pins */ >> + pinctrl-names = "default"; >> + pinctrl-0 = <&tpm_irq>; > > > nit: Please move the pinctrl properties below compatible and reg, as this is > more readable and consistent with other nodes. > Ok will do that. > >> + >> + compatible = "infineon,slb9645tt"; >> + reg = <0x20>; >> + }; >> + }; >> + >> + spi@12d30000 { >> + status = "okay"; >> + samsung,spi-src-clk = <0>; >> + num-cs = <1>; >> + >> + spidev@0 { >> + compatible = "spidev"; >> + reg = <0>; >> + spi-max-frequency = <50000000>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&spi_flash_cs>; >> + >> + controller-data { >> + cs-gpio = <&gpa2 5 0>; >> + samsung,spi-feedback-delay = <2>; >> + }; > > > Hmm, is this really a physical device? Shouldn't this have some kind of real > compatible string first? Also I'm not even sure if "spidev" is supposed to > be used like this, especially considering that this compatible string isn't > even documented in Documentation/devicetree/bindings. (Rob, Mark, Grant, any > opinions on this?) > Yes this is a flash memory sitting on the spi bus. All its operations are standard ones and handled by spidev. spidev still dont have an of_match_table and so its used like this. Please let me know about the right way of using this. Regards Arun > Best regards, > Tomasz -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Tomasz and Arun, On Sat, Apr 26, 2014 at 4:32 AM, Tomasz Figa <tomasz.figa@gmail.com> wrote: > Hi Arun, > > > On 24.04.2014 06:17, Arun Kumar K wrote: >> >> Adds the google peach-pit board dts file which uses >> exynos5420 SoC. >> >> Signed-off-by: Arun Kumar K <arun.kk@samsung.com> >> Signed-off-by: Doug Anderson <dianders@chromium.org> >> --- >> Changes from v1 >> --------------- >> - Addressed review comments from Doug, Sachin & Tushar >> - Removed adc and lid-switch nodes >> --- >> arch/arm/boot/dts/Makefile | 1 + >> arch/arm/boot/dts/exynos5420-peach-pit.dts | 182 >> ++++++++++++++++++++++++++++ >> 2 files changed, 183 insertions(+) >> create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts >> >> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile >> index 35c146f..3220e29 100644 >> --- a/arch/arm/boot/dts/Makefile >> +++ b/arch/arm/boot/dts/Makefile >> @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ >> exynos5250-smdk5250.dtb \ >> exynos5250-snow.dtb \ >> exynos5420-arndale-octa.dtb \ >> + exynos5420-peach-pit.dtb \ >> exynos5420-smdk5420.dtb \ >> exynos5440-sd5v1.dtb \ >> exynos5440-ssdk5440.dtb >> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts >> b/arch/arm/boot/dts/exynos5420-peach-pit.dts >> new file mode 100644 >> index 0000000..fbb0469 >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts >> @@ -0,0 +1,182 @@ >> +/* >> + * Google Peach Pit Rev 6+ board device tree source >> + * >> + * Copyright (c) 2014 Google, Inc >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + */ >> + >> +/dts-v1/; >> +#include <dt-bindings/input/input.h> >> +#include <dt-bindings/gpio/gpio.h> >> +#include "exynos5420.dtsi" >> + >> +/ { >> + model = "Google Peach Pit Rev 6+"; >> + >> + compatible = "google,pit-rev16", >> + "google,pit-rev15", "google,pit-rev14", >> + "google,pit-rev13", "google,pit-rev12", >> + "google,pit-rev11", "google,pit-rev10", >> + "google,pit-rev9", "google,pit-rev8", >> + "google,pit-rev7", "google,pit-rev6", >> + "google,pit", "google,peach","samsung,exynos5420", >> + "samsung,exynos5"; > > > Do you really need so many compatible strings here? Furthermore, are all the > newer revisions really fully backwards compatible with older ones? > > Also, do you have a way to check the revision in hardware, e.g. by some GPIO > pins? If so, I don't think there would be any need to revision number as a > part of compatible string. You can send flames mostly my way for this one. Technically we could replace this with just "google,pit" for now. However if we ever actually ship a new / slightly different revision of pit we might need to introduce these all back in. I can explain how / why we got to this point if you wish... Basically: 1. We'd like to support multiple revisions of hardware both during internal development and post ship. Each unique spin of the board is assigned a different logical ID even if differences are pretty minor or they are probe-able. Sometimes we find out much later that something that was supposed to be a minor change actually necessitates a device tree change. I believe we've only shipped "rev 13" pit boards. However many people in-house at Google and Samsung have older revision boards (some even using as far back as rev 6), so it's very handy to support the old boards if it's not too difficult. Examples of types of changes that have happened: Between rev 8 and rev 9 we switched WiFi chips. That's mostly probe-able. There's a single GPIO difference in the powerup sequence but you could use a sequence that's compatible for both. We've had a unified device tree here since one can work for both, but if we ever found an issue we could always split it. On rev 3, 4, and 5 (dts not submitted upstream) we found an issue where the SoC couldn't handle powering off the INT rail during suspend. On rev 3, 4, and 5 we had HDMI's power coming off a different FET. On rev 4 there was a problem reading the EDID on the panel, so we had to add special logic to handle this. On exynos5250-snow there are actually 3 different revisions released publicly. Right now we only have one device tree but if we want to fully support audio / touchpad we need at least two. If we want to enable thermistors on the original rev (optional, really) then we need a third device tree. 2. As is relatively common, the firmware _doesn't_ ship a device tree. It picks among devices trees that are part of the kernel. 3. We wanted to avoid hacks in the kernel like "if strcmp(compatible, "peach-pit") && revision > 6 && revision < 9". A reasonable solution to the above is to have separate device trees for separate revisions whenever they are different enough that they need it. ...and for cases where they're not very different then use the same device tree. In the case of peach-pit, things got a little extreme. For various reasons the project went through an awful lot of spins during development. If you insist we can drop some of the revisions above. Specifically: * "revision 13" is the shipping revision. You could remove 14, 15, and 16. We tend to put a few extras in so that new revs will "just work". * I believe (80% certain) "revision 11" was never used. --- One other note: I mentioned that you could just use "peach-pit" for now but that you might need to reintroduce revisions later. This is due to an unfortunate bug that was found in the firmware too late to change. Specifically the firmware will first look for "google,pit-rev#" across all of the kernel device trees. If it finds it then we're great. If it doesn't find it, then it will look for "google,pit" across all of the kernel device trees. When it finds the first match it will pick that one. That means if you've got a kernel with two device trees: A: "google,pit-rev14", "google,pit" # imaginary rev 14 B: "google,pit" # older revs When an older rev13 device picks a device tree it might pick _either_ the rev14 one or the other one. -Doug -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, On Sat, Apr 26, 2014 at 5:02 PM, Tomasz Figa <tomasz.figa@gmail.com> wrote: > Hi Arun, > > > On 24.04.2014 06:17, Arun Kumar K wrote: >> >> Adds the google peach-pit board dts file which uses >> exynos5420 SoC. >> >> Signed-off-by: Arun Kumar K <arun.kk@samsung.com> >> Signed-off-by: Doug Anderson <dianders@chromium.org> >> --- >> Changes from v1 >> --------------- >> - Addressed review comments from Doug, Sachin & Tushar >> - Removed adc and lid-switch nodes >> --- >> arch/arm/boot/dts/Makefile | 1 + >> arch/arm/boot/dts/exynos5420-peach-pit.dts | 182 >> ++++++++++++++++++++++++++++ >> 2 files changed, 183 insertions(+) >> create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts >> >> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile >> index 35c146f..3220e29 100644 >> --- a/arch/arm/boot/dts/Makefile >> +++ b/arch/arm/boot/dts/Makefile >> @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ >> exynos5250-smdk5250.dtb \ >> exynos5250-snow.dtb \ >> exynos5420-arndale-octa.dtb \ >> + exynos5420-peach-pit.dtb \ >> exynos5420-smdk5420.dtb \ >> exynos5440-sd5v1.dtb \ >> exynos5440-ssdk5440.dtb >> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts >> b/arch/arm/boot/dts/exynos5420-peach-pit.dts >> new file mode 100644 >> index 0000000..fbb0469 >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts >> @@ -0,0 +1,182 @@ >> +/* >> + * Google Peach Pit Rev 6+ board device tree source >> + * >> + * Copyright (c) 2014 Google, Inc >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + */ >> + >> +/dts-v1/; >> +#include <dt-bindings/input/input.h> >> +#include <dt-bindings/gpio/gpio.h> >> +#include "exynos5420.dtsi" >> + >> +/ { >> + model = "Google Peach Pit Rev 6+"; >> + >> + compatible = "google,pit-rev16", >> + "google,pit-rev15", "google,pit-rev14", >> + "google,pit-rev13", "google,pit-rev12", >> + "google,pit-rev11", "google,pit-rev10", >> + "google,pit-rev9", "google,pit-rev8", >> + "google,pit-rev7", "google,pit-rev6", >> + "google,pit", "google,peach","samsung,exynos5420", >> + "samsung,exynos5"; > > > Do you really need so many compatible strings here? Furthermore, are all the > newer revisions really fully backwards compatible with older ones? > > Also, do you have a way to check the revision in hardware, e.g. by some GPIO > pins? If so, I don't think there would be any need to revision number as a > part of compatible string. > > >> + >> + memory { >> + reg = <0x20000000 0x80000000>; >> + }; >> + >> + fixed-rate-clocks { >> + oscclk { >> + compatible = "samsung,exynos5420-oscclk"; >> + clock-frequency = <24000000>; >> + }; >> + }; >> + >> + pinctrl@13400000 { > > > Please convert this dts file into reference-based syntax. It has multiple > advantages over the legacy way of replicating full paths every time a node > needs to be updated. > > You can see other dts files for examples how this can be used, e.g. > s3c64*.dts* (for a quite simple setup), imx6*.dts* (for more complex > things), etc. > > >> + tpm_irq: tpm-irq { >> + samsung,pins = "gpx1-0"; >> + samsung,pin-function = <0>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + >> + power_key_irq: power-key-irq { >> + samsung,pins = "gpx1-2"; >> + samsung,pin-function = <0>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + }; >> + >> + pinctrl@14010000 { >> + spi_flash_cs: spi-flash-cs { >> + samsung,pins = "gpa2-5"; >> + samsung,pin-function = <1>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <3>; >> + }; >> + >> + backlight_pwm: backlight-pwm { >> + samsung,pins = "gpb2-0"; >> + samsung,pin-function = <2>; >> + samsung,pin-pud = <0>; >> + samsung,pin-drv = <0>; >> + }; >> + }; >> + >> + gpio-keys { >> + compatible = "gpio-keys"; >> + >> + pinctrl-names = "default"; >> + pinctrl-0 = <&power_key_irq>; >> + >> + power { >> + label = "Power"; >> + gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; >> + linux,code = <KEY_POWER>; >> + gpio-key,wakeup; >> + }; >> + }; >> + >> + rtc@101E0000 { >> + status = "okay"; >> + }; >> + >> + serial@12C30000 { >> + status = "okay"; >> + }; >> + >> + mmc@12200000 { >> + status = "okay"; >> + num-slots = <1>; >> + broken-cd; >> + caps2-mmc-hs200-1_8v; >> + supports-highspeed; >> + non-removable; >> + card-detect-delay = <200>; >> + clock-frequency = <400000000>; >> + samsung,dw-mshc-ciu-div = <3>; >> + samsung,dw-mshc-sdr-timing = <0 4>; >> + samsung,dw-mshc-ddr-timing = <0 2>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; >> + >> + slot@0 { >> + reg = <0>; >> + bus-width = <8>; >> + }; >> + }; >> + >> + mmc@12220000 { >> + status = "okay"; >> + num-slots = <1>; >> + supports-highspeed; >> + card-detect-delay = <200>; >> + clock-frequency = <400000000>; >> + samsung,dw-mshc-ciu-div = <3>; >> + samsung,dw-mshc-sdr-timing = <2 3>; >> + samsung,dw-mshc-ddr-timing = <1 2>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; >> + >> + slot@0 { >> + reg = <0>; >> + bus-width = <4>; >> + }; >> + }; >> + >> + i2c@12E10000 { >> + status = "okay"; >> + clock-frequency = <400000>; >> + >> + tpm@20 { >> + /* Unused irq; but still need to configure the >> pins */ >> + pinctrl-names = "default"; >> + pinctrl-0 = <&tpm_irq>; > > > nit: Please move the pinctrl properties below compatible and reg, as this is > more readable and consistent with other nodes. > > >> + >> + compatible = "infineon,slb9645tt"; >> + reg = <0x20>; >> + }; >> + }; >> + >> + spi@12d30000 { >> + status = "okay"; >> + samsung,spi-src-clk = <0>; >> + num-cs = <1>; >> + >> + spidev@0 { >> + compatible = "spidev"; >> + reg = <0>; >> + spi-max-frequency = <50000000>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&spi_flash_cs>; >> + >> + controller-data { >> + cs-gpio = <&gpa2 5 0>; >> + samsung,spi-feedback-delay = <2>; >> + }; > > > Hmm, is this really a physical device? Shouldn't this have some kind of real > compatible string first? Also I'm not even sure if "spidev" is supposed to > be used like this, especially considering that this compatible string isn't > even documented in Documentation/devicetree/bindings. (Rob, Mark, Grant, any > opinions on this?) > Since not much inputs are received on this, I can drop this node for now so that rest of the stuff gets in. I will post an updated patchset addressing other comments. Regards Arun > Best regards, > Tomasz -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Arun, On Wed, Apr 23, 2014 at 9:17 PM, Arun Kumar K <arun.kk@samsung.com> wrote: > Adds the google peach-pit board dts file which uses > exynos5420 SoC. > > Signed-off-by: Arun Kumar K <arun.kk@samsung.com> > Signed-off-by: Doug Anderson <dianders@chromium.org> > --- > Changes from v1 > --------------- > - Addressed review comments from Doug, Sachin & Tushar > - Removed adc and lid-switch nodes > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/exynos5420-peach-pit.dts | 182 ++++++++++++++++++++++++++++ > 2 files changed, 183 insertions(+) > create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 35c146f..3220e29 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ > exynos5250-smdk5250.dtb \ > exynos5250-snow.dtb \ > exynos5420-arndale-octa.dtb \ > + exynos5420-peach-pit.dtb \ > exynos5420-smdk5420.dtb \ > exynos5440-sd5v1.dtb \ > exynos5440-ssdk5440.dtb > diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts > new file mode 100644 > index 0000000..fbb0469 > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts > @@ -0,0 +1,182 @@ > +/* > + * Google Peach Pit Rev 6+ board device tree source > + * > + * Copyright (c) 2014 Google, Inc > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + */ > + > +/dts-v1/; > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/gpio/gpio.h> > +#include "exynos5420.dtsi" > + > +/ { > + model = "Google Peach Pit Rev 6+"; > + > + compatible = "google,pit-rev16", > + "google,pit-rev15", "google,pit-rev14", > + "google,pit-rev13", "google,pit-rev12", > + "google,pit-rev11", "google,pit-rev10", > + "google,pit-rev9", "google,pit-rev8", > + "google,pit-rev7", "google,pit-rev6", > + "google,pit", "google,peach","samsung,exynos5420", > + "samsung,exynos5"; > + > + memory { > + reg = <0x20000000 0x80000000>; > + }; One other thing that came up at ELC: it might not be so wise to include actual values here. We're expecting that the bootloader will probe memory and tell you whether you're on a 2GB board or a 4GB board. IIRC the proper thing to do here is to use 0 for both, so: reg = <0 0>; -Doug -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Doug, On Wed, Apr 30, 2014 at 10:18 PM, Doug Anderson <dianders@chromium.org> wrote: > Arun, > > On Wed, Apr 23, 2014 at 9:17 PM, Arun Kumar K <arun.kk@samsung.com> wrote: >> Adds the google peach-pit board dts file which uses >> exynos5420 SoC. >> >> Signed-off-by: Arun Kumar K <arun.kk@samsung.com> >> Signed-off-by: Doug Anderson <dianders@chromium.org> >> --- >> Changes from v1 >> --------------- >> - Addressed review comments from Doug, Sachin & Tushar >> - Removed adc and lid-switch nodes >> --- >> arch/arm/boot/dts/Makefile | 1 + >> arch/arm/boot/dts/exynos5420-peach-pit.dts | 182 ++++++++++++++++++++++++++++ >> 2 files changed, 183 insertions(+) >> create mode 100644 arch/arm/boot/dts/exynos5420-peach-pit.dts >> >> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile >> index 35c146f..3220e29 100644 >> --- a/arch/arm/boot/dts/Makefile >> +++ b/arch/arm/boot/dts/Makefile >> @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ >> exynos5250-smdk5250.dtb \ >> exynos5250-snow.dtb \ >> exynos5420-arndale-octa.dtb \ >> + exynos5420-peach-pit.dtb \ >> exynos5420-smdk5420.dtb \ >> exynos5440-sd5v1.dtb \ >> exynos5440-ssdk5440.dtb >> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts >> new file mode 100644 >> index 0000000..fbb0469 >> --- /dev/null >> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts >> @@ -0,0 +1,182 @@ >> +/* >> + * Google Peach Pit Rev 6+ board device tree source >> + * >> + * Copyright (c) 2014 Google, Inc >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + */ >> + >> +/dts-v1/; >> +#include <dt-bindings/input/input.h> >> +#include <dt-bindings/gpio/gpio.h> >> +#include "exynos5420.dtsi" >> + >> +/ { >> + model = "Google Peach Pit Rev 6+"; >> + >> + compatible = "google,pit-rev16", >> + "google,pit-rev15", "google,pit-rev14", >> + "google,pit-rev13", "google,pit-rev12", >> + "google,pit-rev11", "google,pit-rev10", >> + "google,pit-rev9", "google,pit-rev8", >> + "google,pit-rev7", "google,pit-rev6", >> + "google,pit", "google,peach","samsung,exynos5420", >> + "samsung,exynos5"; >> + >> + memory { >> + reg = <0x20000000 0x80000000>; >> + }; > > One other thing that came up at ELC: it might not be so wise to > include actual values here. We're expecting that the bootloader will > probe memory and tell you whether you're on a 2GB board or a 4GB > board. IIRC the proper thing to do here is to use 0 for both, so: > > reg = <0 0>; > Ok I will make this change. With this change can I have your Reviewed-by on the v3 patchset? Regards Arun > -Doug -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 35c146f..3220e29 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -74,6 +74,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos5250-smdk5250.dtb \ exynos5250-snow.dtb \ exynos5420-arndale-octa.dtb \ + exynos5420-peach-pit.dtb \ exynos5420-smdk5420.dtb \ exynos5440-sd5v1.dtb \ exynos5440-ssdk5440.dtb diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts new file mode 100644 index 0000000..fbb0469 --- /dev/null +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -0,0 +1,182 @@ +/* + * Google Peach Pit Rev 6+ board device tree source + * + * Copyright (c) 2014 Google, Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include "exynos5420.dtsi" + +/ { + model = "Google Peach Pit Rev 6+"; + + compatible = "google,pit-rev16", + "google,pit-rev15", "google,pit-rev14", + "google,pit-rev13", "google,pit-rev12", + "google,pit-rev11", "google,pit-rev10", + "google,pit-rev9", "google,pit-rev8", + "google,pit-rev7", "google,pit-rev6", + "google,pit", "google,peach","samsung,exynos5420", + "samsung,exynos5"; + + memory { + reg = <0x20000000 0x80000000>; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; + }; + + pinctrl@13400000 { + tpm_irq: tpm-irq { + samsung,pins = "gpx1-0"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + power_key_irq: power-key-irq { + samsung,pins = "gpx1-2"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + + pinctrl@14010000 { + spi_flash_cs: spi-flash-cs { + samsung,pins = "gpa2-5"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + backlight_pwm: backlight-pwm { + samsung,pins = "gpb2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&power_key_irq>; + + power { + label = "Power"; + gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + gpio-key,wakeup; + }; + }; + + rtc@101E0000 { + status = "okay"; + }; + + serial@12C30000 { + status = "okay"; + }; + + mmc@12200000 { + status = "okay"; + num-slots = <1>; + broken-cd; + caps2-mmc-hs200-1_8v; + supports-highspeed; + non-removable; + card-detect-delay = <200>; + clock-frequency = <400000000>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; + + slot@0 { + reg = <0>; + bus-width = <8>; + }; + }; + + mmc@12220000 { + status = "okay"; + num-slots = <1>; + supports-highspeed; + card-detect-delay = <200>; + clock-frequency = <400000000>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + + slot@0 { + reg = <0>; + bus-width = <4>; + }; + }; + + i2c@12E10000 { + status = "okay"; + clock-frequency = <400000>; + + tpm@20 { + /* Unused irq; but still need to configure the pins */ + pinctrl-names = "default"; + pinctrl-0 = <&tpm_irq>; + + compatible = "infineon,slb9645tt"; + reg = <0x20>; + }; + }; + + spi@12d30000 { + status = "okay"; + samsung,spi-src-clk = <0>; + num-cs = <1>; + + spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <50000000>; + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_cs>; + + controller-data { + cs-gpio = <&gpa2 5 0>; + samsung,spi-feedback-delay = <2>; + }; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 1000000 0>; + brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; + default-brightness-level = <7>; + pinctrl-0 = <&backlight_pwm>; + pinctrl-names = "default"; + }; + + /* + * Use longest HW watchdog in SoC (32 seconds) since the hardware + * watchdog provides no debugging information (compared to soft/hard + * lockup detectors) and so should be last resort. + */ + watchdog@101D0000 { + timeout-sec = <32>; + }; +};