From patchwork Sun May 4 15:26:18 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Kurtz X-Patchwork-Id: 4107711 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E644ABFF02 for ; Sun, 4 May 2014 15:27:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 24891203F7 for ; Sun, 4 May 2014 15:27:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4B6E2203EC for ; Sun, 4 May 2014 15:27:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751916AbaEDP0i (ORCPT ); Sun, 4 May 2014 11:26:38 -0400 Received: from mail-pd0-f170.google.com ([209.85.192.170]:58799 "EHLO mail-pd0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751723AbaEDP0g (ORCPT ); Sun, 4 May 2014 11:26:36 -0400 Received: by mail-pd0-f170.google.com with SMTP id v10so556834pde.15 for ; Sun, 04 May 2014 08:26:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=N0IvF+BX3+XsD3EAi/ASzv7J6wd/5ZRO5dOwKtVdUTg=; b=PhroUJxVPzEzv+7GX1ZCGTP+/vw6ePbzzN1ZGgQjACNU3SXLTrr/FvgnNYmj6PvwlI e1ekL1ttvokjzpToCV3ldrgOk3FBNucCyKOsg++ypmE0yJmjA/Fr5kuEZGELPfAs7Ihf lJHEQKM9lnhzvUdvbWHqd55ULmBbHs8W9ZTHU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=N0IvF+BX3+XsD3EAi/ASzv7J6wd/5ZRO5dOwKtVdUTg=; b=ahZliE4kcgJo55CdK00b75+EdgF1cEPc7gptbyKo6M/UYB2LNSY2NYq0SblwxsecQg T23INossVvprKe99zoFYSaKUufJbXT1L1Vo/tiNJgYqWrSyEHfhw4ukB4gDHvrHFjkEO MEG4qoHAyqbdXXtPNlyvEx9fYamoO0DySM0Vk76JX5sMC7sR4Te0ldkZjLuQVDNPjvtb +iO/CadfN7gUG7JXUwCAllHKf5I3SVo3hRb33AyjKstVBd+pCNV9s/dXl95hyeQB9mPR Vk6Btjc8ctnCVWmzLPF9OYyrE2klA95MSL38mxzrnsaDpc7+/B47zLV+MB5x/2sNhlu/ e3qQ== X-Gm-Message-State: ALoCoQnm/c0vG+aZ4Bdi5A884skeZ6+3ngZmiV1kzwyVuF2P0qyywNSrpwyOco9sU4Z4zECkM3kW X-Received: by 10.67.14.69 with SMTP id fe5mr61065496pad.120.1399217196152; Sun, 04 May 2014 08:26:36 -0700 (PDT) Received: from djkurtzt530-glaptop.hitronhub.home (123-193-41-132.dynamic.kbronet.com.tw. [123.193.41.132]) by mx.google.com with ESMTPSA id ry10sm48005129pab.38.2014.05.04.08.26.32 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 04 May 2014 08:26:35 -0700 (PDT) From: Daniel Kurtz To: Inki Dae , Kukjin Kim Cc: Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, seanpaul@chromium.org, marcheu@chromium.org, Daniel Kurtz Subject: [PATCH 1/4] drm/exynos/mixer: move format definitions to regs-mixer Date: Sun, 4 May 2014 23:26:18 +0800 Message-Id: <1399217181-26442-2-git-send-email-djkurtz@chromium.org> X-Mailer: git-send-email 1.9.1.423.g4596e3a In-Reply-To: <1399217181-26442-1-git-send-email-djkurtz@chromium.org> References: <1399217181-26442-1-git-send-email-djkurtz@chromium.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP These constants directly define register values, so move them to the register definition header. Also, the logic used for setting fmt from bpp is either/or, so just use if/else. ** No functional change Signed-off-by: Daniel Kurtz --- drivers/gpu/drm/exynos/exynos_mixer.c | 19 ++++--------------- drivers/gpu/drm/exynos/regs-mixer.h | 4 ++++ 2 files changed, 8 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index ce28881..475eb49 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -518,21 +518,10 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win) win_data = &ctx->win_data[win]; - #define RGB565 4 - #define ARGB1555 5 - #define ARGB4444 6 - #define ARGB8888 7 - - switch (win_data->bpp) { - case 16: - fmt = ARGB4444; - break; - case 32: - fmt = ARGB8888; - break; - default: - fmt = ARGB8888; - } + if (win_data->bpp == 16) + fmt = MXR_GRP_CFG_FORMAT_ARGB4444; + else + fmt = MXR_GRP_CFG_FORMAT_ARGB8888; /* 2x scaling feature */ x_ratio = 0; diff --git a/drivers/gpu/drm/exynos/regs-mixer.h b/drivers/gpu/drm/exynos/regs-mixer.h index 4537026..785a97a 100644 --- a/drivers/gpu/drm/exynos/regs-mixer.h +++ b/drivers/gpu/drm/exynos/regs-mixer.h @@ -114,6 +114,10 @@ #define MXR_GRP_CFG_PIXEL_BLEND_EN (1 << 16) #define MXR_GRP_CFG_FORMAT_VAL(x) MXR_MASK_VAL(x, 11, 8) #define MXR_GRP_CFG_FORMAT_MASK MXR_GRP_CFG_FORMAT_VAL(~0) +#define MXR_GRP_CFG_FORMAT_RGB565 4 +#define MXR_GRP_CFG_FORMAT_ARGB1555 5 +#define MXR_GRP_CFG_FORMAT_ARGB4444 6 +#define MXR_GRP_CFG_FORMAT_ARGB8888 7 #define MXR_GRP_CFG_ALPHA_VAL(x) MXR_MASK_VAL(x, 7, 0) /* bits for MXR_GRAPHICn_WH */