From patchwork Mon May 5 16:26:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhilash Kesavan X-Patchwork-Id: 4115941 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 55FD4BFF02 for ; Mon, 5 May 2014 16:27:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8959E2020F for ; Mon, 5 May 2014 16:27:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 93C1C20251 for ; Mon, 5 May 2014 16:27:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753751AbaEEQ1n (ORCPT ); Mon, 5 May 2014 12:27:43 -0400 Received: from mail-pd0-f172.google.com ([209.85.192.172]:42456 "EHLO mail-pd0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753713AbaEEQ1m (ORCPT ); Mon, 5 May 2014 12:27:42 -0400 Received: by mail-pd0-f172.google.com with SMTP id g10so8167721pdj.17 for ; Mon, 05 May 2014 09:27:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=vRD7/gsJBIotg98b59A1EC4HpUex5+295at3733baEQ=; b=b6i6ksWsKWoNfVcVng02SxAnWzL3fCJ1bLli4Kbt+Frczi94HtiueA1zarlyihUkvF 1OKGByeSz8m58tHPgrMxS3VS4XhmK+NTjsLzzGiHgR4TzPRWLAGQ0ecZSDRc1ctEAlUo ag+UlgmwaDb35FHAvOzYF18amW4f6yRNODYXtasv22JZsABtllnm88aVpziCZ4brduiv a6OXuwLOFnFpzEHxpT4tMLFff0YyExxaOkgJQZLp7yffRmPqztLtC1qEIl56BJhZOXi2 KYN/aiPtjXl0I8oqNLq/kkLTp1ywiSEBFn1QySGwpvtzplNWowSLS/NWdsk81DYCxxcp BMfg== X-Received: by 10.66.141.109 with SMTP id rn13mr73975142pab.117.1399307261688; Mon, 05 May 2014 09:27:41 -0700 (PDT) Received: from localhost.localdomain ([122.171.76.161]) by mx.google.com with ESMTPSA id f5sm74977298pat.11.2014.05.05.09.27.32 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 05 May 2014 09:27:41 -0700 (PDT) From: Abhilash Kesavan To: nicolas.pitre@linaro.org, Dave.Martin@arm.com, lorenzo.pieralisi@arm.com, daniel.lezcano@linaro.org, linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, t.figa@samsung.com, abrestic@chromium.org, thomas.ab@samsung.com, inderpal.s@samsung.com Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, grant.likely@linaro.org, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, kesavan.abhilash@gmail.com, linux-samsung-soc@vger.kernel.org Subject: [PATCH v5 3/5] arm: exynos: Add generic cluster power control functions Date: Mon, 5 May 2014 21:56:59 +0530 Message-Id: <1399307221-8659-4-git-send-email-a.kesavan@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399307221-8659-1-git-send-email-a.kesavan@samsung.com> References: <1399307221-8659-1-git-send-email-a.kesavan@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add generic cluster power control functions for exynos based SoCS for cluster power up/down and to know the cluster status. Signed-off-by: Abhilash Kesavan --- arch/arm/mach-exynos/common.h | 3 +++ arch/arm/mach-exynos/pm.c | 30 ++++++++++++++++++++++++++++++ arch/arm/mach-exynos/regs-pmu.h | 6 ++++++ 3 files changed, 39 insertions(+) diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index a7dbb5f..03b8bb2 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -66,5 +66,8 @@ extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); extern void exynos_cpu_powerdown(int cpu); extern void exynos_cpu_powerup(int cpu); extern int exynos_cpu_power_state(int cpu); +extern void exynos_cluster_powerdown(int cluster); +extern void exynos_cluster_powerup(int cluster); +extern int exynos_cluster_power_state(int cluster); #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 6651028..f02d864 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -136,6 +136,36 @@ int exynos_cpu_power_state(int cpu) S5P_CORE_LOCAL_PWR_EN); } +/** + * exynos_common_powerdown : power down the specified cluster + * @cluster : the cluster to power down + */ +void exynos_cluster_powerdown(int cluster) +{ + __raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster)); +} + +/** + * exynos_cluster_powerup : power up the specified cluster + * @cluster : the cluster to power up + */ +void exynos_cluster_powerup(int cluster) +{ + __raw_writel(S5P_CORE_LOCAL_PWR_EN, + EXYNOS_COMMON_CONFIGURATION(cluster)); +} + +/** + * exynos_cluster_power_state : returns the power state of the cluster + * @cluster : the cluster to retrieve the power state from + * + */ +int exynos_cluster_power_state(int cluster) +{ + return (__raw_readl(EXYNOS_COMMON_STATUS(cluster)) & + S5P_CORE_LOCAL_PWR_EN); +} + /* For Cortex-A9 Diagnostic and Power control register */ static unsigned int save_arm_register[2]; diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h index 0bdfcbc..6685ebf 100644 --- a/arch/arm/mach-exynos/regs-pmu.h +++ b/arch/arm/mach-exynos/regs-pmu.h @@ -127,6 +127,12 @@ #define EXYNOS_ARM_CORE_STATUS(_nr) \ (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x4) +#define EXYNOS_ARM_COMMON_CONFIGURATION S5P_PMUREG(0x2500) +#define EXYNOS_COMMON_CONFIGURATION(_nr) \ + (EXYNOS_ARM_COMMON_CONFIGURATION + (0x80 * (_nr))) +#define EXYNOS_COMMON_STATUS(_nr) \ + (EXYNOS_COMMON_CONFIGURATION(_nr) + 0x4) + /* Only for EXYNOS4210 */ #define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154) #define S5P_CMU_RESET_LCD1_LOWPWR S5P_PMUREG(0x1174)