From patchwork Tue May 6 16:26:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shaik Ameer Basha X-Patchwork-Id: 4122891 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3E2CEBFF02 for ; Tue, 6 May 2014 16:28:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 774D72024F for ; Tue, 6 May 2014 16:28:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 92C6B2020F for ; Tue, 6 May 2014 16:28:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751473AbaEFQ2K (ORCPT ); Tue, 6 May 2014 12:28:10 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:25146 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751453AbaEFQ2I (ORCPT ); Tue, 6 May 2014 12:28:08 -0400 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N55009RYV2VK430@mailout3.samsung.com>; Wed, 07 May 2014 01:28:07 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.125]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id A6.B3.11496.79D09635; Wed, 07 May 2014 01:28:07 +0900 (KST) X-AuditID: cbfee691-b7f3e6d000002ce8-cd-53690d97019b Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 4C.D9.25708.69D09635; Wed, 07 May 2014 01:28:07 +0900 (KST) Received: from chromebld-server.sisodomain.com ([107.108.73.106]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N5500E53V22AU90@mmp2.samsung.com>; Wed, 07 May 2014 01:28:06 +0900 (KST) From: Shaik Ameer Basha To: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: mturquette@linaro.org, kgene.kim@samsung.com, tomasz.figa@gmail.com, t.figa@samsung.com, joshi@samsung.com, shaik.samsung@gmail.com, r.sh.open@gmail.com, alim.akhtar@samsung.com, Shaik Ameer Basha , Rahul Sharma Subject: [PATCH v4 04/15] clk: exynos5420: fix parent clocks for mscl sysmmu Date: Tue, 06 May 2014 21:56:39 +0530 Message-id: <1399393610-23394-5-git-send-email-shaik.ameer@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1399393610-23394-1-git-send-email-shaik.ameer@samsung.com> References: <1399393610-23394-1-git-send-email-shaik.ameer@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprIIsWRmVeSWpSXmKPExsWyRsSkVnc6b2awwflfPBYP5m1js5h/5Byr xfddX9gtehdcZbPY9Pgaq8WM8/uYLJ5OuMhmsfBFvMWURYdZLY483M1usW7nJHaL9TNes1is 2vWH0YHXY+esu+wed67tYfPYvKTeo2/LKkaPz5vkAlijuGxSUnMyy1KL9O0SuDJ2PzjEVnCZ v6Lx116mBsYtvF2MnBwSAiYSDdd+s0LYYhIX7q1n62Lk4hASWMoo8Wnmc8YuRg6woitLBSDi 0xklrvxbzQThTGCSON3xkAmkm03AUGL7vSusIA0iApkSG7fkgtQwC0xmkvj8uIEdpEZYwEdi 0bMLzCA2i4CqxNTNK8DivALuEps73rFCLFOQmDPJBiTMKeAhcejldbDjhIBKTq+4zAgyU0Lg FLvEhhM7oOYISHybfIgFoldWYtMBZohnJCUOrrjBMoFReAEjwypG0dSC5ILipPQiU73ixNzi 0rx0veT83E2MwOg4/e/ZxB2M9w9YH2JMBho3kVlKNDkfGF15JfGGxmZGFqYmpsZG5pZmpAkr ifOmP0oKEhJITyxJzU5NLUgtii8qzUktPsTIxMEp1cBYWtVZ7m8vkHQt5t3qBJ9PV6a/yWoP aKiRPtLAu1Fmu46mVOP1LJFpDaqf7rx3t24p27hByPdk/ZLFlg3XJoaHtFporNCw+f3pmLUh u/4xk8vrmha4CZlNfth04o77i9sTmYOvnfn38lnyvRi+748kDjAWXvzO+rRn6/R4wwyvqh/R Apv7ZKSUWIozEg21mIuKEwE/O6r1pAIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrHIsWRmVeSWpSXmKPExsVy+t9jQd3pvJnBBnOOMFs8mLeNzWL+kXOs Ft93fWG36F1wlc1i0+NrrBYzzu9jsng64SKbxcIX8RZTFh1mtTjycDe7xbqdk9gt1s94zWKx atcfRgdej52z7rJ73Lm2h81j85J6j74tqxg9Pm+SC2CNamC0yUhNTEktUkjNS85PycxLt1Xy Do53jjc1MzDUNbS0MFdSyEvMTbVVcvEJ0HXLzAG6UUmhLDGnFCgUkFhcrKRvh2lCaIibrgVM Y4Sub0gQXI+RARpIWMOYsfvBIbaCy/wVjb/2MjUwbuHtYuTgkBAwkbiyVKCLkRPIFJO4cG89 WxcjF4eQwHRGiSv/VjNBOBOYJE53PGQCqWITMJTYfu8KK0iziECmxMYtuSA1zAKTmSQ+P25g B6kRFvCRWPTsAjOIzSKgKjF18wqwOK+Au8TmjnesEIsVJOZMsgEJcwp4SBx6eZ0VxBYCKjm9 4jLjBEbeBYwMqxhFUwuSC4qT0nON9IoTc4tL89L1kvNzNzGCY++Z9A7GVQ0WhxgFOBiVeHgt 3mYEC7EmlhVX5h5ilOBgVhLhvcOWGSzEm5JYWZValB9fVJqTWnyIMRnoqInMUqLJ+cC0kFcS b2hsYm5qbGppYmFiZkmasJI478FW60AhgfTEktTs1NSC1CKYLUwcnFINjJxJe7M8p8zZPPvQ puX+jlYOgh0Wz02//LXX2XArd/fPjc2LAjW1e1cZbaw8sMU0P86I37Ux9T6n2qwbyVMULGY0 eNQL2Itkb/aZHrNjmq31vVlXH6yU+7HbQ2D/8oDYDs92r7eVTKENC/J+lJ/LC+15Iz3pB6PO 4x1nZH1dpjmnTJA3YdAXVGIpzkg01GIuKk4EAJlb/fcBAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch fixes the parent clocks for mscl sysmmu. Signed-off-by: Rahul Sharma Signed-off-by: Shaik Ameer Basha Reviewed-by: Alim Akhtar --- drivers/clk/samsung/clk-exynos5420.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 328be6a..320f72d 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -582,6 +582,9 @@ static struct samsung_div_clock exynos5420_div_clks[] __initdata = { DIV2_RATIO0, 4, 2), DIV(0, "dout_gscl_blk_333", "aclk333_432_gscl", DIV2_RATIO0, 6, 2), + /* MSCL Block */ + DIV(0, "dout_mscl_blk", "aclk400_mscl", DIV2_RATIO0, 28, 2), + /* ISP Block */ DIV(0, "dout_isp_sensor0", "mout_isp_sensor", SCLK_DIV_ISP0, 8, 8), DIV(0, "dout_isp_sensor1", "mout_isp_sensor", SCLK_DIV_ISP0, 16, 8), @@ -812,12 +815,12 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { GATE(CLK_MSCL0, "mscl0", "aclk400_mscl", GATE_IP_MSCL, 0, 0, 0), GATE(CLK_MSCL1, "mscl1", "aclk400_mscl", GATE_IP_MSCL, 1, 0, 0), GATE(CLK_MSCL2, "mscl2", "aclk400_mscl", GATE_IP_MSCL, 2, 0, 0), - GATE(CLK_SMMU_MSCL0, "smmu_mscl0", "aclk400_mscl", - GATE_IP_MSCL, 8, 0, 0), - GATE(CLK_SMMU_MSCL1, "smmu_mscl1", "aclk400_mscl", - GATE_IP_MSCL, 9, 0, 0), - GATE(CLK_SMMU_MSCL2, "smmu_mscl2", "aclk400_mscl", - GATE_IP_MSCL, 10, 0, 0), + GATE(CLK_SMMU_MSCL0, "smmu_mscl0", "dout_mscl_blk", + GATE_IP_MSCL, 8, CLK_SET_RATE_PARENT, 0), + GATE(CLK_SMMU_MSCL1, "smmu_mscl1", "dout_mscl_blk", + GATE_IP_MSCL, 9, CLK_SET_RATE_PARENT, 0), + GATE(CLK_SMMU_MSCL2, "smmu_mscl2", "dout_mscl_blk", + GATE_IP_MSCL, 10, CLK_SET_RATE_PARENT, 0), GATE(CLK_FIMD1, "fimd1", "aclk300_disp1", GATE_IP_DISP1, 0, 0, 0), GATE(CLK_DSIM1, "dsim1", "aclk200_disp1", GATE_IP_DISP1, 3, 0, 0),