| Message ID | 14-v5-d0a204c678c7+3d16a-iommu_all_defdom_jgg@nvidia.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | iommu: Make default_domain's mandatory | expand |
On 24/07/2023 20:22, Jason Gunthorpe wrote: > What msm does during omap_iommu_set_platform_dma() is actually putting the typo: msm driver doesn't use/provide omap_iommu_set_platform_dma(). > iommu into identity mode. > > Move to the new core support for ARM_DMA_USE_IOMMU by defining > ops->identity_domain. > > This driver does not support IOMMU_DOMAIN_DMA, however it cannot be > compiled on ARM64 either. Most likely it is fine to support dma-iommu.c > > Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> > --- > drivers/iommu/msm_iommu.c | 23 +++++++++++++++++++---- > 1 file changed, 19 insertions(+), 4 deletions(-) > > diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c > index 79d89bad5132b7..26ed81cfeee897 100644 > --- a/drivers/iommu/msm_iommu.c > +++ b/drivers/iommu/msm_iommu.c > @@ -443,15 +443,20 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) > return ret; > } > > -static void msm_iommu_set_platform_dma(struct device *dev) > +static int msm_iommu_identity_attach(struct iommu_domain *identity_domain, > + struct device *dev) > { > struct iommu_domain *domain = iommu_get_domain_for_dev(dev); > - struct msm_priv *priv = to_msm_priv(domain); > + struct msm_priv *priv; > unsigned long flags; > struct msm_iommu_dev *iommu; > struct msm_iommu_ctx_dev *master; > - int ret; > + int ret = 0; > > + if (domain == identity_domain || !domain) > + return 0; > + > + priv = to_msm_priv(domain); > free_io_pgtable_ops(priv->iop); > > spin_lock_irqsave(&msm_iommu_lock, flags); > @@ -468,8 +473,18 @@ static void msm_iommu_set_platform_dma(struct device *dev) > } > fail: > spin_unlock_irqrestore(&msm_iommu_lock, flags); > + return ret; > } > > +static struct iommu_domain_ops msm_iommu_identity_ops = { > + .attach_dev = msm_iommu_identity_attach, > +}; > + > +static struct iommu_domain msm_iommu_identity_domain = { > + .type = IOMMU_DOMAIN_IDENTITY, > + .ops = &msm_iommu_identity_ops, > +}; > + > static int msm_iommu_map(struct iommu_domain *domain, unsigned long iova, > phys_addr_t pa, size_t pgsize, size_t pgcount, > int prot, gfp_t gfp, size_t *mapped) > @@ -675,10 +690,10 @@ irqreturn_t msm_iommu_fault_handler(int irq, void *dev_id) > } > > static struct iommu_ops msm_iommu_ops = { > + .identity_domain = &msm_iommu_identity_domain, > .domain_alloc = msm_iommu_domain_alloc, > .probe_device = msm_iommu_probe_device, > .device_group = generic_device_group, > - .set_platform_dma_ops = msm_iommu_set_platform_dma, > .pgsize_bitmap = MSM_IOMMU_PGSIZES, > .of_xlate = qcom_iommu_of_xlate, > .default_domain_ops = &(const struct iommu_domain_ops) {
diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c index 79d89bad5132b7..26ed81cfeee897 100644 --- a/drivers/iommu/msm_iommu.c +++ b/drivers/iommu/msm_iommu.c @@ -443,15 +443,20 @@ static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) return ret; } -static void msm_iommu_set_platform_dma(struct device *dev) +static int msm_iommu_identity_attach(struct iommu_domain *identity_domain, + struct device *dev) { struct iommu_domain *domain = iommu_get_domain_for_dev(dev); - struct msm_priv *priv = to_msm_priv(domain); + struct msm_priv *priv; unsigned long flags; struct msm_iommu_dev *iommu; struct msm_iommu_ctx_dev *master; - int ret; + int ret = 0; + if (domain == identity_domain || !domain) + return 0; + + priv = to_msm_priv(domain); free_io_pgtable_ops(priv->iop); spin_lock_irqsave(&msm_iommu_lock, flags); @@ -468,8 +473,18 @@ static void msm_iommu_set_platform_dma(struct device *dev) } fail: spin_unlock_irqrestore(&msm_iommu_lock, flags); + return ret; } +static struct iommu_domain_ops msm_iommu_identity_ops = { + .attach_dev = msm_iommu_identity_attach, +}; + +static struct iommu_domain msm_iommu_identity_domain = { + .type = IOMMU_DOMAIN_IDENTITY, + .ops = &msm_iommu_identity_ops, +}; + static int msm_iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t pa, size_t pgsize, size_t pgcount, int prot, gfp_t gfp, size_t *mapped) @@ -675,10 +690,10 @@ irqreturn_t msm_iommu_fault_handler(int irq, void *dev_id) } static struct iommu_ops msm_iommu_ops = { + .identity_domain = &msm_iommu_identity_domain, .domain_alloc = msm_iommu_domain_alloc, .probe_device = msm_iommu_probe_device, .device_group = generic_device_group, - .set_platform_dma_ops = msm_iommu_set_platform_dma, .pgsize_bitmap = MSM_IOMMU_PGSIZES, .of_xlate = qcom_iommu_of_xlate, .default_domain_ops = &(const struct iommu_domain_ops) {
What msm does during omap_iommu_set_platform_dma() is actually putting the iommu into identity mode. Move to the new core support for ARM_DMA_USE_IOMMU by defining ops->identity_domain. This driver does not support IOMMU_DOMAIN_DMA, however it cannot be compiled on ARM64 either. Most likely it is fine to support dma-iommu.c Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> --- drivers/iommu/msm_iommu.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-)