From patchwork Thu May 15 21:07:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chirantan Ekbote X-Patchwork-Id: 4185971 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0B11EBFF02 for ; Thu, 15 May 2014 21:09:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 221EE20306 for ; Thu, 15 May 2014 21:09:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A380320254 for ; Thu, 15 May 2014 21:09:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754758AbaEOVJN (ORCPT ); Thu, 15 May 2014 17:09:13 -0400 Received: from mail-pb0-f52.google.com ([209.85.160.52]:45478 "EHLO mail-pb0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751673AbaEOVJM (ORCPT ); Thu, 15 May 2014 17:09:12 -0400 Received: by mail-pb0-f52.google.com with SMTP id rr13so1591563pbb.39 for ; Thu, 15 May 2014 14:09:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=ZVNfc2UQ8j63EGcZ/w3tM504vefA24PH35GolU36rQ0=; b=Rm+/uPoVL2tXbaOP3T6njM20boWwdJf+5qA4h1A9QOIFvKbClbCxj1PfSgFBNdcsmU 3PQDqp0iZ0AdqQstNLvkDLofAXmCs0lHX4UewjV3AvLsYF2MKTzS6nD+irRDHbzFzXTx QcL4DfLmzRGR/p608sspm07ps4k44SU6+5RYU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ZVNfc2UQ8j63EGcZ/w3tM504vefA24PH35GolU36rQ0=; b=Iush4Mw28GwUVKMQ9r2/70IflTsw07jTLwa8J356kfyiZWcriK2kolvDLSB91F4qig T/ov9c+AI2m6kJHNZ+lZXAlqtIiVYPXaiCdoYKW9jI82ve490o19fVNiONn51MBVy3eR tv2/0H16XD7VQTJ5iqc+QTsOFzDSRCUPeC92xrOFdrc9kQOHa5pY/WdtjKMRr3e7eRGe eKBByEIb9GOdq6V5MiHVA99gHWVYwgYPjaz+lf6x/OHiwTsdTPGD9y146LObbOfjGHNA 1WtNe17eFrXMOFQR8BbbOpWQ28mqGwMIxtEehtzygWO++RvASdBg8xn4oOSQdPhT8T9Y O7uw== X-Gm-Message-State: ALoCoQnMLY7dF+RnZL92PlGD1wmD8jAKrrhTQVrd816vhG0Lse5H4BJgU81CuQqdbHUkFxZCcG/r X-Received: by 10.66.226.145 with SMTP id rs17mr15237923pac.144.1400188151815; Thu, 15 May 2014 14:09:11 -0700 (PDT) Received: from endor.mtv.corp.google.com (endor.mtv.corp.google.com [172.22.73.11]) by mx.google.com with ESMTPSA id pr4sm10731774pbb.53.2014.05.15.14.09.10 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 15 May 2014 14:09:10 -0700 (PDT) From: Chirantan Ekbote To: Russell King Cc: Chirantan Ekbote , Olof Johansson , Doug Anderson , Kukjin Kim , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH] arm: dts: exynos5: Remove multi core timer Date: Thu, 15 May 2014 14:07:59 -0700 Message-Id: <1400188079-21832-1-git-send-email-chirantan@chromium.org> X-Mailer: git-send-email 1.9.1.423.g4596e3a Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The multi core timer and the ARM architected timer are two different interfaces to the same underlying hardware timer. This causes some strange timing issues when they are both enabled at the same time so remove the mct from the device tree and keep only the architected timer. Cc: Olof Johansson Cc: Doug Anderson Cc: Kukjin Kim Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Signed-off-by: Chirantan Ekbote --- arch/arm/boot/dts/exynos5250.dtsi | 24 ------------------------ arch/arm/boot/dts/exynos5420.dtsi | 30 ------------------------------ 2 files changed, 54 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 3742331..60cd945 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -110,30 +110,6 @@ clock-frequency = <24000000>; }; - mct@101C0000 { - compatible = "samsung,exynos4210-mct"; - reg = <0x101C0000 0x800>; - interrupt-controller; - #interrups-cells = <2>; - interrupt-parent = <&mct_map>; - interrupts = <0 0>, <1 0>, <2 0>, <3 0>, - <4 0>, <5 0>; - clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; - clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <2>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0x0 0 &combiner 23 3>, - <0x1 0 &combiner 23 4>, - <0x2 0 &combiner 25 2>, - <0x3 0 &combiner 25 3>, - <0x4 0 &gic 0 120 0>, - <0x5 0 &gic 0 121 0>; - }; - }; - pmu { compatible = "arm,cortex-a15-pmu"; interrupt-parent = <&combiner>; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index c3a9a66..3c38c6d 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -169,36 +169,6 @@ status = "disabled"; }; - mct@101C0000 { - compatible = "samsung,exynos4210-mct"; - reg = <0x101C0000 0x800>; - interrupt-controller; - #interrups-cells = <1>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, - <8>, <9>, <10>, <11>; - clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; - clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &combiner 23 3>, - <1 &combiner 23 4>, - <2 &combiner 25 2>, - <3 &combiner 25 3>, - <4 &gic 0 120 0>, - <5 &gic 0 121 0>, - <6 &gic 0 122 0>, - <7 &gic 0 123 0>, - <8 &gic 0 128 0>, - <9 &gic 0 129 0>, - <10 &gic 0 130 0>, - <11 &gic 0 131 0>; - }; - }; - gsc_pd: power-domain@10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>;