From patchwork Mon May 26 15:29:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shukla X-Patchwork-Id: 4243791 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E3702BF90B for ; Mon, 26 May 2014 15:30:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E909E2016C for ; Mon, 26 May 2014 15:30:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0C1FB2012E for ; Mon, 26 May 2014 15:30:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752334AbaEZPal (ORCPT ); Mon, 26 May 2014 11:30:41 -0400 Received: from mail-pb0-f51.google.com ([209.85.160.51]:56887 "EHLO mail-pb0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751984AbaEZPai (ORCPT ); Mon, 26 May 2014 11:30:38 -0400 Received: by mail-pb0-f51.google.com with SMTP id ma3so7904823pbc.10 for ; Mon, 26 May 2014 08:30:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=FtaAYGV131Uv178avlI+SlAVSZUlkmuW8UTSXmYdWsM=; b=W/PGL4QRj2UVSN+53GJsuu1ZWkqaXWUoeSPtE5mfVSN+AvLZvRRw260kbB+XrN3B5e vK/Ht57qNplAMd5NHRRimeWoFFZkcYbD2HfUxJW0+ShBNjgW2VE3zeHEXaYNNEHVIy9t q7LA2ZKrf6x59eAYSlgbcvdt3iokoBhbwnwvXhGwCNqEa5LYMhWKRfQ5kJ8/qk9IQX/7 wxoehVSZREMtT8ipdVR28JNiYSHr8qPeTEbzQ125QAHoyF2k68gBXI1/3xOPvsrc1aCM fyEY1aBXzOgtHvh6QbnPyBoBkkDn655pGaxNtkmMJTdWCvwrOwp1c4DhzDDBu3lFskVW h+/A== X-Gm-Message-State: ALoCoQlTcHQDEe/CPQBENJu1QwigZteVvpT7AAJb29tZjUXm4TddMR+ZfoEFpvwg3MPRHJgRqW6W X-Received: by 10.66.142.233 with SMTP id rz9mr29178089pab.71.1401118237949; Mon, 26 May 2014 08:30:37 -0700 (PDT) Received: from santosh-Latitude-E5530-non-vPro.mvista.com ([111.93.218.67]) by mx.google.com with ESMTPSA id ue3sm14280965pbc.49.2014.05.26.08.30.34 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 26 May 2014 08:30:36 -0700 (PDT) From: Santosh Shukla To: viresh.kumar@linaro.org, kgene.kim@samsung.com, thomas.abraham@linaro.org, t.figa@samsung.com, linux-samsung-soc@vger.kernel.org Cc: linaro-kernel@lists.linaro.org, santosh shukla Subject: [PATCH v2] ARM: Exynos : Fix build error with thumb2 Date: Mon, 26 May 2014 20:59:47 +0530 Message-Id: <1401118187-10844-1-git-send-email-santosh.shukla@linaro.org> X-Mailer: git-send-email 1.7.9.5 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: santosh shukla add non-global symbol .LLl2x0_regs_phys to avoid build break in thumb2 mode. IIUC, arm assembler fail to load value of "global" variable l2xo_regs_phys for thum2 mode and wrapping it in non-global symbol like .Ll2x0_regs_phys solves the build break issue. arch/arm/mach-exynos/sleep.S: Assembler messages: arch/arm/mach-exynos/sleep.S:57: Error: invalid immediate for address calculation (value = 0x00000004) fix inspired from [1] [1] : https://lkml.org/lkml/2010/3/31/235 Signed-off-by: santosh shukla --- arch/arm/mach-exynos/sleep.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-exynos/sleep.S b/arch/arm/mach-exynos/sleep.S index a2613e9..dc8c6b6 100644 --- a/arch/arm/mach-exynos/sleep.S +++ b/arch/arm/mach-exynos/sleep.S @@ -54,7 +54,7 @@ ENTRY(exynos_cpu_resume) ldr r1, =CPU_CORTEX_A9 cmp r0, r1 bne skip_l2_resume - adr r0, l2x0_regs_phys + adr r0, .Ll2x0_regs_phys ldr r0, [r0] cmp r0, #0 beq skip_l2_resume @@ -79,6 +79,8 @@ skip_l2_resume: b cpu_resume ENDPROC(exynos_cpu_resume) #ifdef CONFIG_CACHE_L2X0 + +.Ll2x0_regs_phys: .globl l2x0_regs_phys l2x0_regs_phys: .long 0