From patchwork Tue Jun 3 18:48:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chirantan Ekbote X-Patchwork-Id: 4290091 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id AC7D39F1D6 for ; Tue, 3 Jun 2014 18:48:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BDC14201BC for ; Tue, 3 Jun 2014 18:48:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 82CC2201BA for ; Tue, 3 Jun 2014 18:48:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753707AbaFCSsh (ORCPT ); Tue, 3 Jun 2014 14:48:37 -0400 Received: from mail-pb0-f49.google.com ([209.85.160.49]:36515 "EHLO mail-pb0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752885AbaFCSsg (ORCPT ); Tue, 3 Jun 2014 14:48:36 -0400 Received: by mail-pb0-f49.google.com with SMTP id jt11so5837591pbb.36 for ; Tue, 03 Jun 2014 11:48:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=LwXyYiGjdzP0IlRnafULVAdKSsH9AeSnznqy4qSoemc=; b=coYfHuqR0WZpkBQj+vAIe+YcacZWgUHMZqY1/enRkZtF6j0pBFlJ2B9NPBgec/gf9K twOB8wDSyd4Bean6touZaRWvkX6ArIMaKY7xQ0F0RLJB9jWShOU+SfTe2dCDD40NkjbB e35C6zlonpWV3dTDyzPq6dBfRTk/jOKGYYSE0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=LwXyYiGjdzP0IlRnafULVAdKSsH9AeSnznqy4qSoemc=; b=TLBj5mdZpuX1gimWvsEiD96FrCpM+T2A7OKYm54KigXNSrlO3ZxBJ1NNNcBWWsobyr mfdJE7RDculw/XGXlCBZUHdGjMHGkb8sIt+ttKfx0RYJ992XWA/tbUI05BKDfyY4ugrT Y9ouFpxk511Zs1u8UWvDI3eQA+80JfAi82JQmOBSmpxdLsvE2XkF+f67sAPZdRUGIPUK yGvw0YMaBNOjqfoMk2wG3MvV8Bdw4mIN3U3jTdbdATNk0lbUtDj8CEYd/lvItcMohcp2 pvwjzPU0ny2ue4TuXGxdmZ5qvndobJmeTm7jSVckPkUF673zZf067Inm7jMF6F6W+Q0S uE/Q== X-Gm-Message-State: ALoCoQnNJ3FCsHJd1ugQixePKBPDHmnnzkfAcym8+hipSeMIgqFRcu8vNk5p5+XDw0YbtZPT0sXp X-Received: by 10.68.173.65 with SMTP id bi1mr53907265pbc.130.1401821315459; Tue, 03 Jun 2014 11:48:35 -0700 (PDT) Received: from endor.mtv.corp.google.com (endor.mtv.corp.google.com [172.22.73.11]) by mx.google.com with ESMTPSA id iq10sm215844pbc.14.2014.06.03.11.48.34 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Jun 2014 11:48:34 -0700 (PDT) From: Chirantan Ekbote To: linux@arm.linux.org.uk Cc: Chirantan Ekbote , Olof Johansson , Doug Anderson , Kukjin Kim , Tomasz Figa , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH] arm: mct: Don't reset the counter during boot and resume Date: Tue, 3 Jun 2014 11:48:19 -0700 Message-Id: <1401821299-24431-1-git-send-email-chirantan@chromium.org> X-Mailer: git-send-email 1.9.1.423.g4596e3a Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Unfortunately on some exynos systems, resetting the mct counter also resets the architected timer counter. This can cause problems if the architected timer driver has already been initialized because the kernel will think that the counter has wrapped around, causing a big jump in printk timestamps and delaying any scheduled clock events until the counter reaches the value it had before it was reset. The kernel code makes no assumptions about the initial value of the mct counter so there is no reason from a software perspective to clear the counter before starting it. This also fixes the problems described in the previous paragraph. Cc: Olof Johansson Cc: Doug Anderson Cc: Kukjin Kim Cc: Tomasz Figa Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Signed-off-by: Chirantan Ekbote Reviewed-by: Doug Anderson Tested-by: Doug Anderson --- drivers/clocksource/exynos_mct.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index acf5a32..9b4a0ae 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -152,13 +152,10 @@ static void exynos4_mct_write(unsigned int value, unsigned long offset) } /* Clocksource handling */ -static void exynos4_mct_frc_start(u32 hi, u32 lo) +static void exynos4_mct_frc_start(void) { u32 reg; - exynos4_mct_write(lo, EXYNOS4_MCT_G_CNT_L); - exynos4_mct_write(hi, EXYNOS4_MCT_G_CNT_U); - reg = __raw_readl(reg_base + EXYNOS4_MCT_G_TCON); reg |= MCT_G_TCON_START; exynos4_mct_write(reg, EXYNOS4_MCT_G_TCON); @@ -180,7 +177,7 @@ static cycle_t exynos4_frc_read(struct clocksource *cs) static void exynos4_frc_resume(struct clocksource *cs) { - exynos4_mct_frc_start(0, 0); + exynos4_mct_frc_start(); } struct clocksource mct_frc = { @@ -194,7 +191,7 @@ struct clocksource mct_frc = { static void __init exynos4_clocksource_init(void) { - exynos4_mct_frc_start(0, 0); + exynos4_mct_frc_start(); if (clocksource_register_hz(&mct_frc, clk_rate)) panic("%s: can't register clocksource\n", mct_frc.name);