From patchwork Fri Jun 6 12:12:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Gautam X-Patchwork-Id: 4311401 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 86E69BEEAA for ; Fri, 6 Jun 2014 12:13:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B6675201DD for ; Fri, 6 Jun 2014 12:13:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D945E201BC for ; Fri, 6 Jun 2014 12:13:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751686AbaFFMMu (ORCPT ); Fri, 6 Jun 2014 08:12:50 -0400 Received: from mail-pd0-f182.google.com ([209.85.192.182]:53805 "EHLO mail-pd0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751677AbaFFMMs (ORCPT ); Fri, 6 Jun 2014 08:12:48 -0400 Received: by mail-pd0-f182.google.com with SMTP id r10so2350604pdi.13 for ; Fri, 06 Jun 2014 05:12:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=YM/PDa4bQdmirBBarX9CAOh8az6+3+xZA3xxFP23pz0=; b=qLqVcuO5szCHE3/IVU5zCM1cfssxmYGOnvYIzDxylkeBxEUFJfanJtqGifTENLv6Te m0b5mvoeLMuoljelOTAcdy+/MAivhhYppRJb9oMCMMrW8obZAk7NPbhll5xwNW5n7/6q x8xX2kvl25KyDzqEmP225Y+jTdmOuapolXo8OTHtojQrWyKkLhDS6rBq1pCjZ1Ar3XtO q44ar3xYCHe0au7Qddh5ZB3R0U9nx+tv4w+A15J3pS7zMgOiSWdcLX96TPQ7dAos2RIL ULD5k2g2TxTVjwUdMOo17GYRFkm6o3xrorjhZ5bu0e7aD4i7U9rIf37zuzPcJhUUgGHL Ve/Q== X-Received: by 10.68.240.68 with SMTP id vy4mr108766pbc.127.1402056767083; Fri, 06 Jun 2014 05:12:47 -0700 (PDT) Received: from vivek-linuxpc.sisodomain.com ([14.140.216.146]) by mx.google.com with ESMTPSA id su8sm35172740pbc.72.2014.06.06.05.12.43 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 06 Jun 2014 05:12:46 -0700 (PDT) From: Vivek Gautam To: linux-usb@vger.kernel.org, linux-samsung-soc@vger.kernel.org, gregkh@linuxfoundation.org, kishon@ti.com, mathias.nyman@intel.com Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, jwerner@chromium.org, Vivek Gautam Subject: [PATCH 3/4] usb: host: xhci-plat: Caibrate PHY post host reset Date: Fri, 6 Jun 2014 17:42:14 +0530 Message-Id: <1402056736-12674-4-git-send-email-gautam.vivek@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1402056736-12674-1-git-send-email-gautam.vivek@samsung.com> References: <1402056736-12674-1-git-send-email-gautam.vivek@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some quirky PHYs may require to be calibrated post the host controller initialization. The USB 3.0 DRD PHY on Exynos5420/5800 systems is one such PHY which needs to calibrated post xhci's reset at initialization time and at resume time, to get the controller work at SuperSpeed. Signed-off-by: Vivek Gautam --- drivers/usb/host/xhci-plat.c | 50 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index e7145b5..7be03df 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -32,10 +32,51 @@ static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci) xhci->quirks |= XHCI_PLAT; } +static int xhci_plat_calibrate_phy(struct xhci_hcd *xhci) +{ + int ret = 0; + struct usb_hcd *hcd = xhci_to_hcd(xhci); + + /* calibrate phy if available */ + if (!IS_ERR(xhci->phy2_gen)) { + ret = phy_calibrate(xhci->phy2_gen); + if (ret < 0 && ret != -ENOTSUPP) { + dev_err(hcd->self.controller, + "failed to calibrate USB 2.0 type PHY\n"); + return ret; + } + } + + if (!IS_ERR(xhci->phy3_gen)) { + ret = phy_calibrate(xhci->phy3_gen); + if (ret < 0 && ret != -ENOTSUPP) + dev_err(hcd->self.controller, + "failed to calibrate USB 3.0 type PHY\n"); + } + + return ret; +} + /* called during probe() after chip reset completes */ static int xhci_plat_setup(struct usb_hcd *hcd) { - return xhci_gen_setup(hcd, xhci_plat_quirks); + struct xhci_hcd *xhci; + int ret; + + ret = xhci_gen_setup(hcd, xhci_plat_quirks); + if (ret) { + dev_err(hcd->self.controller, "xhci setup failed\n"); + return ret; + } + + if (!usb_hcd_is_primary_hcd(hcd)) { + xhci = hcd_to_xhci(hcd); + ret = xhci_plat_calibrate_phy(xhci); + if (ret) + return ret; + } + + return 0; } static int xhci_plat_start(struct usb_hcd *hcd) @@ -276,8 +317,13 @@ static int xhci_plat_resume(struct device *dev) { struct usb_hcd *hcd = dev_get_drvdata(dev); struct xhci_hcd *xhci = hcd_to_xhci(hcd); + int ret; + + ret = xhci_resume(xhci, 0); + if (ret) + return ret; - return xhci_resume(xhci, 0); + return xhci_plat_calibrate_phy(xhci); } static const struct dev_pm_ops xhci_plat_pm_ops = {