From patchwork Fri Jun 6 21:43:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 4313611 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8901BBEEAA for ; Fri, 6 Jun 2014 21:43:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 880BD201F7 for ; Fri, 6 Jun 2014 21:43:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A0750201C7 for ; Fri, 6 Jun 2014 21:43:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752108AbaFFVnU (ORCPT ); Fri, 6 Jun 2014 17:43:20 -0400 Received: from mail-vc0-f202.google.com ([209.85.220.202]:52180 "EHLO mail-vc0-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752482AbaFFVnT (ORCPT ); Fri, 6 Jun 2014 17:43:19 -0400 Received: by mail-vc0-f202.google.com with SMTP id lc6so669901vcb.3 for ; Fri, 06 Jun 2014 14:43:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=yhKH/SgT5lIf9fWqIv4ejj3JrIYqYgIV+WZuihrekSg=; b=lGw2SoS9R8KDSJG8odTX1Apv3tM2stZQDtNZiSjiVS58n6N6idrViCNRUVBh66TXvP TlTMm3D1HIVuyEuqkFaLfqxisrbjkLYaEUSGpA5dwr43JfmDlsDPC1tubuOZcjIO/eIT 4307BzBqP5mlSj95qZbyclwGX8qKJRqY3kAhwYcVTnfgCdvpRX5wif8V8zXwVvCFTMh3 zGGG6V1xESZIyh5i727itCm51opIcXV6KOS0sRVHxmA8t/m92OkrZNc5Bkik47GE3qJT wTCaS6AHRL+RARGSfJCpNkerWMzCRWKdyGlTi09kHI17YdQQBQhyS6NkDb2UiqXYZ2SJ s/Ew== X-Gm-Message-State: ALoCoQk0Zjlq1iuZOCGjTYnAwAHi3E+nXfJtTEurEWuFSBL3yrHq7qqKjjFxuT6QgmSDFVgvN3M5 X-Received: by 10.58.187.68 with SMTP id fq4mr5209178vec.0.1402090997997; Fri, 06 Jun 2014 14:43:17 -0700 (PDT) Received: from corp2gmr1-2.hot.corp.google.com (corp2gmr1-2.hot.corp.google.com [172.24.189.93]) by gmr-mx.google.com with ESMTPS id l7si739631vda.3.2014.06.06.14.43.17 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 06 Jun 2014 14:43:17 -0700 (PDT) Received: from tictac.mtv.corp.google.com (tictac.mtv.corp.google.com [172.22.72.141]) by corp2gmr1-2.hot.corp.google.com (Postfix) with ESMTP id A54DB5A4629; Fri, 6 Jun 2014 14:43:17 -0700 (PDT) Received: by tictac.mtv.corp.google.com (Postfix, from userid 121310) id 4170A81033; Fri, 6 Jun 2014 14:43:17 -0700 (PDT) From: Doug Anderson To: Kukjin Kim , Nicolas Pitre Cc: Abhilash Kesavan , Andrew Bresticker , Inderpal Singh , Thomas Abraham , olof@lixom.net, Tushar Behera , Kevin Hilman , Javier Martinez Canillas , linux-samsung-soc@vger.kernel.org, Doug Anderson , linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] ARM: EXYNOS: mcpm: Don't rely on firmware's secondary_cpu_start Date: Fri, 6 Jun 2014 14:43:05 -0700 Message-Id: <1402090985-8061-1-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.0.0.526.g5318336 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On exynos mcpm systems the firmware is hardcoded to jump to an address in SRAM (0x02073000) when secondary CPUs come up. By default the firmware puts a bunch of code at that location. That code expects the kernel to fill in a few slots with addresses that it uses to jump back to the kernel's entry point for secondary CPUs. Originally (on prerelease hardware) this firmware code contained a bunch of workarounds to deal with boot ROM bugs. However on all shipped hardware we simply use this code to redirect to a kernel function for bringing up the CPUs. Let's stop relying on the code provided by the bootloader and just plumb in our own (simple) code jump to the kernel. This has the nice benefit of fixing problems due to the fact that older bootloaders (like the one shipped on the Samsung Chromebook 2) might have put slightly different code into this location. Once suspend/resume is implemented for systems using exynos-mcpm we'll need to make sure we reinstall our fixed up code after resume. ...but that's not anything new since IRAM (and thus the address of the mcpm_entry_point) is lost across suspend/resume anyway. Signed-off-by: Doug Anderson --- arch/arm/mach-exynos/mcpm-exynos.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index 0498d0b..3a7fad0 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -343,11 +343,13 @@ static int __init exynos_mcpm_init(void) pr_info("Exynos MCPM support installed\n"); /* - * Future entries into the kernel can now go - * through the cluster entry vectors. + * U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr + * as part of secondary_cpu_start(). Let's redirect it to the + * mcpm_entry_point(). */ - __raw_writel(virt_to_phys(mcpm_entry_point), - ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET); + __raw_writel(0xe59f0000, ns_sram_base_addr); /* ldr r0, [pc, #0] */ + __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx r0 */ + __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8); iounmap(ns_sram_base_addr);