From patchwork Mon Jun 16 10:26:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 4357541 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D90D1BEEAA for ; Mon, 16 Jun 2014 10:28:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 06E8A201ED for ; Mon, 16 Jun 2014 10:28:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 28E6F20103 for ; Mon, 16 Jun 2014 10:28:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932140AbaFPK2I (ORCPT ); Mon, 16 Jun 2014 06:28:08 -0400 Received: from mail-pa0-f48.google.com ([209.85.220.48]:36618 "EHLO mail-pa0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755351AbaFPK0s (ORCPT ); Mon, 16 Jun 2014 06:26:48 -0400 Received: by mail-pa0-f48.google.com with SMTP id et14so3073918pad.35 for ; Mon, 16 Jun 2014 03:26:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=zQ+bunsO7m8Bzckshxo9xEkPQdQEUEKsbjRoR6ASa3g=; b=Edc3415RWgOmyEUl/bc27pXwXXX5tTB+AOZ12Ye5XavEjsGkp3OWueI/OvtnQamum2 lsPAuAt93fHV/ZDdBmhudBc+6DtBv2mr+z/uENg1kmjv8BqLlF45SHrNl0oXpV2ID+nX TzR5LadKYapTHiMZYNUjUOrGKvf0f0vZFxbvMzavLaobTilm7TNeLKKEhgLJH92LdPUw HwcaWPk0Ea6flhaJcSQSNgjid0ACTOq5BVCUp4aDNT+bXBY7CVu5G9cmfBKfifkwEiVI oPOhsbLVvL2NwnGuKoCgO+t4jnbVK2ge1ojLSw3yHCyp46YOZuiPUfD8ocnXS8NBgWCC 2AOw== X-Received: by 10.68.229.68 with SMTP id so4mr22740919pbc.110.1402914407691; Mon, 16 Jun 2014 03:26:47 -0700 (PDT) Received: from localhost.localdomain ([14.140.216.146]) by mx.google.com with ESMTPSA id gr10sm17922046pbc.84.2014.06.16.03.26.43 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 16 Jun 2014 03:26:47 -0700 (PDT) From: Chander Kashyap To: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, daniel.lezcano@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, kgene.kim@samsung.com, tomasz.figa@gmail.com, Chander Kashyap , Chander Kashyap Subject: [Patch v7 2/6] arm: exynos: add generic function to calculate cpu number Date: Mon, 16 Jun 2014 15:56:19 +0530 Message-Id: <1402914383-20471-3-git-send-email-k.chander@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1402914383-20471-1-git-send-email-k.chander@samsung.com> References: <1402914383-20471-1-git-send-email-k.chander@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Chander Kashyap The address of cpu power registers in pmu is based on cpu number offsets. This function calculate the same. This is essentially required in case of multi-cluster SoC's e.g Exynos5420. Signed-off-by: Chander Kashyap Signed-off-by: Chander Kashyap Reviewed-by: Tomasz Figa --- arch/arm/mach-exynos/regs-pmu.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h index 1d13b08..aff23bd 100644 --- a/arch/arm/mach-exynos/regs-pmu.h +++ b/arch/arm/mach-exynos/regs-pmu.h @@ -323,4 +323,13 @@ #define EXYNOS5420_SWRESET_KFC_SEL 0x3 +#include +#define MAX_CPUS_IN_CLUSTER 4 + +static inline unsigned int exynos_pmu_cpunr(unsigned int mpidr) +{ + return ((MPIDR_AFFINITY_LEVEL(mpidr, 1) * MAX_CPUS_IN_CLUSTER) + + MPIDR_AFFINITY_LEVEL(mpidr, 0)); +} + #endif /* __ASM_ARCH_REGS_PMU_H */