From patchwork Mon Jun 16 10:26:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 4357481 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0AD5D9F26E for ; Mon, 16 Jun 2014 10:27:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DC391201C0 for ; Mon, 16 Jun 2014 10:27:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 656702020E for ; Mon, 16 Jun 2014 10:27:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932122AbaFPK1I (ORCPT ); Mon, 16 Jun 2014 06:27:08 -0400 Received: from mail-pb0-f52.google.com ([209.85.160.52]:45185 "EHLO mail-pb0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932101AbaFPK1F (ORCPT ); Mon, 16 Jun 2014 06:27:05 -0400 Received: by mail-pb0-f52.google.com with SMTP id rq2so2275486pbb.39 for ; Mon, 16 Jun 2014 03:27:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=hhU7sMe6h1ymZEdFqcP92/IW8sdE0TmoNoeSlKd3pJ8=; b=QdGRkcokNCfNSqokDZuAnYOsCRCyyOEFcNN0jReBlaHIzH4RZuEGnk7/s4Y+n1v+Tp 79fyOT6fuTNoNIEX4w5NtrWZ+GG2XYBsqVXsJ8mqcdkq+0aOSGX/7opLtZWsZPJ6DAdJ JssSqauxkTu2hsd1LQN63X2nJngEpTPPlPYyXjoME92u1LmbXi9G/oXjUxluhy9/FW1y AU/NEQLU7h3uKv0jeh/qhdiCOuHasikqGEs51kU/HQzYNrea4RmCPCzKc8RWwWa/M8sR 5HfSaYRPVr1trhnx2HLeoK47TaqcPbML28gnIuV9S3hF3WsRCbq/kUEznQnN8b3H+jZF nvYQ== X-Received: by 10.68.233.37 with SMTP id tt5mr23268231pbc.154.1402914424946; Mon, 16 Jun 2014 03:27:04 -0700 (PDT) Received: from localhost.localdomain ([14.140.216.146]) by mx.google.com with ESMTPSA id gr10sm17922046pbc.84.2014.06.16.03.27.00 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 16 Jun 2014 03:27:04 -0700 (PDT) From: Chander Kashyap To: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, daniel.lezcano@linaro.org, lorenzo.pieralisi@arm.com, rjw@rjwysocki.net, kgene.kim@samsung.com, tomasz.figa@gmail.com, Chander Kashyap , Chander Kashyap Subject: [Patch v7 6/6] mcpm: exynos: populate suspend and powered_up callbacks Date: Mon, 16 Jun 2014 15:56:23 +0530 Message-Id: <1402914383-20471-7-git-send-email-k.chander@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1402914383-20471-1-git-send-email-k.chander@samsung.com> References: <1402914383-20471-1-git-send-email-k.chander@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Chander Kashyap In order to support cpuidle through mcpm, suspend and powered-up callbacks are required in mcpm platform code. Hence populate the same callbacks. Signed-off-by: Chander Kashyap Signed-off-by: Chander Kashyap Reviewed-by: Tomasz Figa --- Changes in v6: None Changes in v5: 1. Add comment to address cache access while c-bit is cleared in SCLTR 2. Make exynos_powered_up static Changes in v4: None Changes in v3: 1. Removed coherency enablement after suspend failure. 2. Use generic function to poweron cpu. changes in v2: 1. Fixed typo: enynos_pmu_cpunr to exynos_pmu_cpunr arch/arm/mach-exynos/mcpm-exynos.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index 0498d0b..fc47e68 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -258,10 +258,46 @@ static int exynos_wait_for_powerdown(unsigned int cpu, unsigned int cluster) return -ETIMEDOUT; /* timeout */ } +static void exynos_powered_up(void) +{ + unsigned int mpidr, cpu, cluster; + + mpidr = read_cpuid_mpidr(); + cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); + cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); + + arch_spin_lock(&exynos_mcpm_lock); + if (cpu_use_count[cpu][cluster] == 0) + cpu_use_count[cpu][cluster] = 1; + arch_spin_unlock(&exynos_mcpm_lock); +} + +static void exynos_suspend(u64 residency) +{ + unsigned int mpidr, cpunr; + + exynos_power_down(); + + /* + * Execution reaches here only if cpu did not power down. + * Hence roll back the changes done in exynos_power_down function. + * + * CAUTION: "This function requires the stack data to be visible through + * power down and can only be executed on processors like A15 and A7 + * that hit the cache with the C bit clear in the SCTLR register." + */ + mpidr = read_cpuid_mpidr(); + cpunr = exynos_pmu_cpunr(mpidr); + + exynos_cpu_power_up(cpunr); +} + static const struct mcpm_platform_ops exynos_power_ops = { .power_up = exynos_power_up, .power_down = exynos_power_down, .wait_for_powerdown = exynos_wait_for_powerdown, + .suspend = exynos_suspend, + .powered_up = exynos_powered_up, }; static void __init exynos_mcpm_usage_count_init(void)