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[2/3] ARM: dts: exynos5420: Add sysreg phandle to FIMD node

Message ID 1403705752-24469-3-git-send-email-ajaykumar.rs@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ajay Kumar June 25, 2014, 2:15 p.m. UTC 
Add sysreg phandle to FIMD node so that we are able
to control DISP1BLK configuration in FIMD driver.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
---
 arch/arm/boot/dts/exynos5420.dtsi |    1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index e385322..4be3090 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -521,6 +521,7 @@ 
 		samsung,power-domain = <&disp_pd>;
 		clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
 		clock-names = "sclk_fimd", "fimd";
+		samsung,sysreg-phandle = <&sysreg_system_controller>;
 	};
 
 	adc: adc@12D10000 {