From patchwork Tue Aug 26 14:18:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 4782461 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7FC569F2A9 for ; Tue, 26 Aug 2014 14:20:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 67A4620127 for ; Tue, 26 Aug 2014 14:20:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 99D682015E for ; Tue, 26 Aug 2014 14:20:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758699AbaHZOTT (ORCPT ); Tue, 26 Aug 2014 10:19:19 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:42203 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758516AbaHZOSL (ORCPT ); Tue, 26 Aug 2014 10:18:11 -0400 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NAX00C3N3V5JH40@mailout1.w1.samsung.com>; Tue, 26 Aug 2014 15:21:05 +0100 (BST) X-AuditID: cbfec7f4-b7f156d0000063c7-e9-53fc97210e97 Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id A1.6F.25543.1279CF35; Tue, 26 Aug 2014 15:18:09 +0100 (BST) Received: from AMDC1227.digital.local ([106.116.147.199]) by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0NAX0026P3Q361B0@eusync2.samsung.com>; Tue, 26 Aug 2014 15:18:09 +0100 (BST) From: Tomasz Figa To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Russell King - ARM Linux , Kukjin Kim , lauraa@codeaurora.org, linux-omap@vger.kernel.org, linus.walleij@linaro.org, santosh.shilimkar@ti.com, tony@atomide.com, drake@endlessm.com, Marek Szyprowski , Tomasz Figa , loeliger@gmail.com, Tomasz Figa Subject: [PATCH v4 7/7] ARM: dts: exynos4: Add nodes for L2 cache controller Date: Tue, 26 Aug 2014 16:18:00 +0200 Message-id: <1409062680-15906-8-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 2.0.4 In-reply-to: <1409062680-15906-1-git-send-email-t.figa@samsung.com> References: <1409062680-15906-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrELMWRmVeSWpSXmKPExsVy+t/xK7qK0/8EG+x9a2zxaP5jZoveBVfZ LLZ3zmC3mPJnOZPFpsfXWC0u75rDZjF7ST+LxYzz+5gsbl/mtTi3fQuLxdojd9ktXvetYbZY P+M1i8WqXX8YLfZf8XLg92hp7mHz+PZ1EovH5b5eJo9F37M8ds66y+5x59oeNo/NS+o9+ras YvQ4fmM7k8fnTXIBXFFcNimpOZllqUX6dglcGT339rAUHOSp6H72ma2BcT5XFyMnh4SAicTB qy3MELaYxIV769lAbCGBpYwSH6d4djFyAdl9TBJLPi9hAkmwCahJfG54BFYkIqAq8bltATuI zSxwgFmifWUAiC0s4CNxs7WJFcRmAar5dOoCWA2vgJPErd872CCWyUms2rgPbCangLPEni99 zBCLnSSe7N/HPoGRdwEjwypG0dTS5ILipPRcQ73ixNzi0rx0veT83E2MkHD+soNx8TGrQ4wC HIxKPLwfSn4HC7EmlhVX5h5ilOBgVhLh/ZH0J1iINyWxsiq1KD++qDQntfgQIxMHp1QD45KQ /ZF5jnfMX297/z1gEb//5xufozYpivmVO17kZPkRNn37Fper506zukd9XPzijVTpseVqK/vU lsxXy9Rf90gv/gn/vDnpBrNv13Sxb07/nDQx/5Zsoc2TpmRZr4eVN7Sjj4XFKZ3+p/FuSvbj Sqmlzhs2Pf95yrB2ucgSwZ9eqw7Naqz5Y6bEUpyRaKjFXFScCAArCj+7RQIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds device tree nodes for L2 cache controller present on Exynos4 SoCs. Signed-off-by: Tomasz Figa --- arch/arm/boot/dts/exynos4210.dtsi | 9 +++++++++ arch/arm/boot/dts/exynos4x12.dtsi | 14 ++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 807bb5b..8a182c4 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -64,6 +64,15 @@ reg = <0x10023CA0 0x20>; }; + l2c: l2-cache-controller@10502000 { + compatible = "arm,pl310-cache"; + reg = <0x10502000 0x1000>; + cache-unified; + cache-level = <2>; + arm,tag-latency = <2 2 1>; + arm,data-latency = <2 2 1>; + }; + gic: interrupt-controller@10490000 { cpu-offset = <0x8000>; }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 861bb91..c7adfd6 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -54,6 +54,20 @@ reg = <0x10023CA0 0x20>; }; + l2c: l2-cache-controller@10502000 { + compatible = "arm,pl310-cache"; + reg = <0x10502000 0x1000>; + cache-unified; + cache-level = <2>; + arm,tag-latency = <2 2 1>; + arm,data-latency = <3 2 1>; + arm,double-linefill = <1>; + arm,double-linefill-incr = <0>; + arm,double-linefill-wrap = <1>; + arm,prefetch-drop = <1>; + arm,prefetch-offset = <7>; + }; + clock: clock-controller@10030000 { compatible = "samsung,exynos4412-clock"; reg = <0x10030000 0x20000>;