From patchwork Tue Sep 2 15:35:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Krishna Chatradhi X-Patchwork-Id: 4826761 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 77AEE9F32F for ; Tue, 2 Sep 2014 15:43:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 78F472017D for ; Tue, 2 Sep 2014 15:43:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 63C3D2017E for ; Tue, 2 Sep 2014 15:43:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754190AbaIBPnT (ORCPT ); Tue, 2 Sep 2014 11:43:19 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:15577 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754628AbaIBPnP (ORCPT ); Tue, 2 Sep 2014 11:43:15 -0400 Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NBA00EAL6C1AVC0@mailout3.samsung.com>; Wed, 03 Sep 2014 00:43:13 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.126]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id 92.E5.02948.195E5045; Wed, 03 Sep 2014 00:43:13 +0900 (KST) X-AuditID: cbfee68d-f79c46d000000b84-d3-5405e591cc4a Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 1D.FA.04943.195E5045; Wed, 03 Sep 2014 00:43:13 +0900 (KST) Received: from chnaveen-ubuntu.sisodomain.com ([107.108.83.161]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NBA002I96728OC0@mmp1.samsung.com>; Wed, 03 Sep 2014 00:43:13 +0900 (KST) From: Naveen Krishna Chatradhi To: linux-arm-kernel@lists.infradead.org Cc: naveenkrishna.ch@gmail.com, linux-samsung-soc@vger.kernel.org, catalin.marinas@arm.com, robh@kernel.org, devicetree@vger.kernel.org, t.figa@samsung.com, kgene.kim@samsung.com Subject: [PATCH v2 5/7] arm64: dts: Add initial device tree support for EXYNOS7 Date: Tue, 02 Sep 2014 21:05:41 +0530 Message-id: <1409672143-8574-6-git-send-email-ch.naveen@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1409672143-8574-1-git-send-email-ch.naveen@samsung.com> References: <1409672143-8574-1-git-send-email-ch.naveen@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCLMWRmVeSWpSXmKPExsWyRsSkTnfiU9YQg+2Nphbvl/UwWsw/co7V onfBVTaLTY+vsVrMOL+PyWLRtv/MFv/37GC3WD/jNYsDh8eaeWsYPXbOusvusWlVJ5vH5iX1 Hn1bVjF6fN4kF8AWxWWTkpqTWZZapG+XwJXx/ell1oJfhhUvm9cwNzBuUO9i5OSQEDCRePRg LxOELSZx4d56ti5GLg4hgaWMEgvuHGWEKdr+ayZUYhGjxIWP51ghnH4miQu9c9lAqtgEzCQO LlrNDmKLCGhITOl6zA5SxCywjVHiyacnLCAJYQF/iYdrX4AVsQioSmzZdI8ZxOYVcJGYO/cD 0DoOoHUKEnMm2YCEOQVcJZY82MYGEhYCKjlxyhxkpITAKnaJqa+uMEOMEZD4NvkQC0SrrMSm A8wQR0tKHFxxg2UCo/ACRoZVjKKpBckFxUnpRYZ6xYm5xaV56XrJ+bmbGIGBf/rfs94djLcP WB9iFOBgVOLhlfjBEiLEmlhWXJl7iNEUaMNEZinR5HxgfOWVxBsamxlZmJqYGhuZW5opifMq Sv0MFhJITyxJzU5NLUgtii8qzUktPsTIxMEpBQzmoqW2Ap3z+YSmnTyo7Tk571rmJ/6OJPd5 /Tpvpqxz+bLfKXWeqOFF70mSt2+fOy5rmTBvRferl6vyjH8vWLZgS4Xg8loj439fQrqNWmqN T/rFJx9ky5zYFvpUeH6ZwY+PLKU9OYHu0uYTq5oePlDfkmWw7NfVdVtbejdLWlz2eLNI6/k8 DislluKMREMt5qLiRABF9hZTdwIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrHIsWRmVeSWpSXmKPExsVy+t9jAd2JT1lDDPqadCzeL+thtJh/5Byr Re+Cq2wWmx5fY7WYcX4fk8Wibf+ZLf7v2cFusX7GaxYHDo8189YweuycdZfdY9OqTjaPzUvq Pfq2rGL0+LxJLoAtqoHRJiM1MSW1SCE1Lzk/JTMv3VbJOzjeOd7UzMBQ19DSwlxJIS8xN9VW ycUnQNctMwfoICWFssScUqBQQGJxsZK+HaYJoSFuuhYwjRG6viFBcD1GBmggYQ1jxvenl1kL fhlWvGxew9zAuEG9i5GTQ0LARGL7r5lsELaYxIV764FsLg4hgUWMEhc+nmOFcPqZJC70zgWr YhMwkzi4aDU7iC0ioCExpesxO0gRs8A2Roknn56wgCSEBfwlHq59AVbEIqAqsWXTPWYQm1fA RWLu3A+MXYwcQOsUJOZMsgEJcwq4Six5sI0NJCwEVHLilPkERt4FjAyrGEVTC5ILipPScw31 ihNzi0vz0vWS83M3MYLj6pnUDsaVDRaHGAU4GJV4eCV/sIQIsSaWFVfmHmKU4GBWEuEteMQa IsSbklhZlVqUH19UmpNafIjRFOimicxSosn5wJjPK4k3NDYxNzU2tTSxMDGzVBLnPdBqHSgk kJ5YkpqdmlqQWgTTx8TBKdXAaOXN9KLm1q4GwZ1dh7LMSraG5i912FE6aenZ1+unuM1+mzpx s5pB7qRHOWbpk2/EbJ9xNsGw1/vqfAu52pYs3Z1zpVT0E3uXZh1Ufm5TJx58pvK28Lvld0xX 8ohOqI4Ju1OmeH3/9mnZ05v4P+9aG9+qk33pyY6MXcXpC9flcS2f9PPoLfmEo0osxRmJhlrM RcWJALugTanBAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-8.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add initial device tree nodes for EXYNOS7 SoC and board dts file to support Espresso board based on Exynos7 SoC. Signed-off-by: Naveen Krishna Chatradhi Cc: Rob Herring Cc: Catalin Marinas --- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 31 +++++ arch/arm64/boot/dts/exynos/exynos7.dtsi | 168 +++++++++++++++++++++++ 3 files changed, 200 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos7-espresso.dts create mode 100644 arch/arm64/boot/dts/exynos/exynos7.dtsi diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index c52bdb0..a3bc18a 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_ARCH_EXYNOS7) += exynos/exynos7-espresso.dtb dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb dtb-$(CONFIG_ARCH_XGENE) += apm-mustang.dtb diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts new file mode 100644 index 0000000..f6a8879 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts @@ -0,0 +1,31 @@ +/* + * SAMSUNG Exynos7 Espresso board device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos7.dtsi" + +/ { + model = "Samsung Exynos7 Espresso board based on EXYNOS7"; + compatible = "samsung,exynos7-espresso", "samsung,exynos7"; + + chosen { + linux,stdout-path = &serial_2; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0x0 0xC0000000>; + }; +}; + +&serial_2 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi new file mode 100644 index 0000000..e593af55 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -0,0 +1,168 @@ +/* + * SAMSUNG EXYNOS7 SoC device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +/ { + compatible = "samsung,exynos7"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &serial_0; + serial1 = &serial_1; + serial2 = &serial_2; + serial3 = &serial_3; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x1>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x2>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x3>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + soc: soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0x18000000>; + + chipid@10000000 { + compatible = "samsung,exynos4210-chipid"; + reg = <0x10000000 0x100>; + }; + + fin_pll: xxti { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "fin_pll"; + #clock-cells = <0>; + }; + + gic: interrupt-controller@11001000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x11001000 0x1000>, + <0x11002000 0x1000>, + <0x11004000 0x2000>, + <0x11006000 0x2000>; + }; + + clock_topc: clock-controller@10570000 { + compatible = "samsung,exynos7-clock-topc"; + reg = <0x10570000 0x10000>; + #clock-cells = <1>; + }; + + clock_top0: clock-controller@105d0000 { + compatible = "samsung,exynos7-clock-top0"; + reg = <0x105d0000 0xb000>; + #clock-cells = <1>; + }; + + clock_peric0: clock-controller@13610000 { + compatible = "samsung,exynos7-clock-peric0"; + reg = <0x13610000 0xd00>; + #clock-cells = <1>; + }; + + clock_peric1: clock-controller@14C80000 { + compatible = "samsung,exynos7-clock-peric1"; + reg = <0x14c80000 0xd00>; + #clock-cells = <1>; + }; + + clock_peris: clock-controller@10040000 { + compatible = "samsung,exynos7-clock-peris"; + reg = <0x10040000 0xd00>; + #clock-cells = <1>; + }; + + serial_0: serial@13630000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13630000 0x100>; + interrupts = <0 440 0>; + clocks = <&clock_peric0 PCLK_UART0>, <&clock_peric0 SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial_1: serial@14c20000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x14c20000 0x100>; + interrupts = <0 456 0>; + clocks = <&clock_peric1 PCLK_UART1>, <&clock_peric1 SCLK_UART1>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial_2: serial@14c30000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x14c30000 0x100>; + interrupts = <0 457 0>; + clocks = <&clock_peric1 PCLK_UART2>, <&clock_peric1 SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial_3: serial@14c40000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x14c40000 0x100>; + interrupts = <0 458 0>; + clocks = <&clock_peric1 PCLK_UART3>, <&clock_peric1 SCLK_UART3>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xff01>, + <1 14 0xff01>, + <1 11 0xff01>, + <1 10 0xff01>; + }; + }; +};