From patchwork Wed Oct 29 09:23:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 5185751 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D4876C11AC for ; Wed, 29 Oct 2014 09:26:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0D7F5200DF for ; Wed, 29 Oct 2014 09:26:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D802D2021A for ; Wed, 29 Oct 2014 09:26:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932243AbaJ2J0H (ORCPT ); Wed, 29 Oct 2014 05:26:07 -0400 Received: from mailout3.w1.samsung.com ([210.118.77.13]:62599 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756141AbaJ2JXP (ORCPT ); Wed, 29 Oct 2014 05:23:15 -0400 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NE70048B8VHUC60@mailout3.w1.samsung.com>; Wed, 29 Oct 2014 09:26:05 +0000 (GMT) X-AuditID: cbfec7f4-b7f6c6d00000120b-ed-5450b2019a04 Received: from eusync1.samsung.com ( [203.254.199.211]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 1C.04.04619.102B0545; Wed, 29 Oct 2014 09:23:13 +0000 (GMT) Received: from amdc1339.digital.local ([106.116.147.30]) by eusync1.samsung.com (Oracle Communications Messaging Server 7u4-23.01 (7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0NE700DWE8QECT50@eusync1.samsung.com>; Wed, 29 Oct 2014 09:23:13 +0000 (GMT) From: Marek Szyprowski To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Tomasz Figa , Kyungmin Park , Russell King - ARM Linux , Kukjin Kim , lauraa@codeaurora.org, linux-omap@vger.kernel.org, linus.walleij@linaro.org, tony@atomide.com, drake@endlessm.com, loeliger@gmail.com, Mark Rutland Subject: [PATCH v7 7/8] ARM: EXYNOS: Add support for non-secure L2X0 resume Date: Wed, 29 Oct 2014 10:23:00 +0100 Message-id: <1414574581-2320-8-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1414574581-2320-1-git-send-email-m.szyprowski@samsung.com> References: <1414574581-2320-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMLMWRmVeSWpSXmKPExsVy+t/xy7qMmwJCDM7MZrR4NP8xs0Xvgqts Fmeb3rBbbO+cwW4x5c9yJotNj6+xWlzeNYfNYvaSfhaLGef3MVncvsxrcW77FhaLtUfuslss vX6RyWLVrj+MFvuveDnwe6yZt4bRo6W5h83j29dJLB6X+3qZPBZ9z/LYOesuu8eda3vYPDYv qffo27KK0ePzJrkArigum5TUnMyy1CJ9uwSujPf3fzEX7BWouHDiPlMD4ybeLkZODgkBE4n3 65+zQthiEhfurWfrYuTiEBJYyiixfs85sISQQB+TxLVWfxCbTcBQouttFxuILSKQLfHj22QW kAZmgT5mifPTe5hBEsIC3hK3p/8Fa2YRUJVoW9UJZvMKuEss3j6PBWKbnMT/lyuYQGxOAQ+J 1ReWsEEsc5fYeLibbQIj7wJGhlWMoqmlyQXFSem5hnrFibnFpXnpesn5uZsYIQH9ZQfj4mNW hxgFOBiVeHg1dvuHCLEmlhVX5h5ilOBgVhLh3WEeECLEm5JYWZValB9fVJqTWnyIkYmDU6qB sdVs89OKVb+7dqxQMo1m7F5SXuUgfOQF440r4WUR25M37nvp9F1JWcvLPuXU0u6k33enPZzL VWzAf6anyPhYUs3ttJ1fSiebFrU0/eJo5lPwjqu7ou/jGH/XKv69YavU66en2Ni/H9sde5pn UfKy69+erdRI97HtzXNa3Ougx2hzU7NZ+ji7EktxRqKhFnNRcSIAOb75/UYCAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tomasz Figa On Exynos SoCs it is necessary to resume operation of L2C early in assembly code, because otherwise certain systems will crash. This patch adds necessary code to non-secure resume handler. Signed-off-by: Tomasz Figa [rewrote the code accessing l2x0_saved_regs] Sigend-off-by: Marek Szyprowski --- arch/arm/mach-exynos/sleep.S | 46 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm/mach-exynos/sleep.S b/arch/arm/mach-exynos/sleep.S index e3c373082bbe..31d25834b9c4 100644 --- a/arch/arm/mach-exynos/sleep.S +++ b/arch/arm/mach-exynos/sleep.S @@ -16,6 +16,8 @@ */ #include +#include +#include #include "smc.h" #define CPU_MASK 0xff0ffff0 @@ -74,6 +76,45 @@ ENTRY(exynos_cpu_resume_ns) mov r0, #SMC_CMD_C15RESUME dsb smc #0 +#ifdef CONFIG_CACHE_L2X0 + adr r0, 1f + ldr r2, [r0] + add r0, r2, r0 + + /* Check that the address has been initialised. */ + ldr r1, [r0, #L2X0_R_PHY_BASE] + teq r1, #0 + beq skip_l2x0 + + /* Check if controller has been enabled. */ + ldr r2, [r1, #L2X0_CTRL] + tst r2, #0x1 + bne skip_l2x0 + + ldr r1, [r0, #L2X0_R_TAG_LATENCY] + ldr r2, [r0, #L2X0_R_DATA_LATENCY] + ldr r3, [r0, #L2X0_R_PREFETCH_CTRL] + mov r0, #SMC_CMD_L2X0SETUP1 + smc #0 + + /* Reload saved regs pointer because smc corrupts registers. */ + adr r0, 1f + ldr r2, [r0] + add r0, r2, r0 + + ldr r1, [r0, #L2X0_R_PWR_CTRL] + ldr r2, [r0, #L2X0_R_AUX_CTRL] + mov r0, #SMC_CMD_L2X0SETUP2 + smc #0 + + mov r0, #SMC_CMD_L2X0INVALL + smc #0 + + mov r1, #1 + mov r0, #SMC_CMD_L2X0CTRL + smc #0 +skip_l2x0: +#endif /* CONFIG_CACHE_L2X0 */ skip_cp15: b cpu_resume ENDPROC(exynos_cpu_resume_ns) @@ -83,3 +124,8 @@ cp15_save_diag: .globl cp15_save_power cp15_save_power: .long 0 @ cp15 power control + +#ifdef CONFIG_CACHE_L2X0 + .align +1: .long l2x0_saved_regs - . +#endif /* CONFIG_CACHE_L2X0 */