From patchwork Fri Nov 7 05:20:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhilash Kesavan X-Patchwork-Id: 5249661 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 054A09F2F1 for ; Fri, 7 Nov 2014 05:21:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EACC32015A for ; Fri, 7 Nov 2014 05:21:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AB1D520154 for ; Fri, 7 Nov 2014 05:21:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751717AbaKGFVQ (ORCPT ); Fri, 7 Nov 2014 00:21:16 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:34373 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751708AbaKGFVP (ORCPT ); Fri, 7 Nov 2014 00:21:15 -0500 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NEN00KF0LJDSX10@mailout3.samsung.com>; Fri, 07 Nov 2014 14:21:13 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.125]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 29.DB.18484.9C65C545; Fri, 07 Nov 2014 14:21:13 +0900 (KST) X-AuditID: cbfee68f-f791c6d000004834-ff-545c56c9fce1 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id B8.9F.20081.9C65C545; Fri, 07 Nov 2014 14:21:13 +0900 (KST) Received: from abhilash-ubuntu.sisodomain.com ([107.108.73.92]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NEN0081DLIM3CV0@mmp1.samsung.com>; Fri, 07 Nov 2014 14:21:12 +0900 (KST) From: Abhilash Kesavan To: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org, catalin.marinas@arm.com, robh@kernel.org, devicetree@vger.kernel.org, olof@lixom.net, arnd@arndb.de, tomasz.figa@gmail.com, kesavan.abhilash@gmail.com, Naveen Krishna Ch Subject: [PATCH v6 2/7] arm64: dts: Add initial device tree support for EXYNOS7 Date: Fri, 07 Nov 2014 10:50:50 +0530 Message-id: <1415337655-31003-3-git-send-email-a.kesavan@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1415337655-31003-1-git-send-email-a.kesavan@samsung.com> References: <1415337655-31003-1-git-send-email-a.kesavan@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrALMWRmVeSWpSXmKPExsWyRsSkVvdkWEyIwbwOBYu/k46xW7xf1sNo Mf/IOVaLNX+VLDY9vsZqMeP8PiaLRdv+M1ucuv6ZzeL/nh3sFqt2/WF04PJYM28No8fvX5MY PXbOusvusWlVJ5vH5iX1HldONLF6fN4kF8AexWWTkpqTWZZapG+XwJUxrXETS8EW24prLw8w NTAeMehi5OCQEDCReN0o1sXICWSKSVy4t54NxBYSWMoo8eGAAUTcROLNuk9MXYxcQPFFjBIv WicwQhT1MUlM+sEMYrMJ6Eks+PcVzBYR0JCY0vWYHaSBWeAzo8TtVVvZQRLCAv4Se1c0gG1g EVCVeHagnxXE5hVwleg4fZQJ4iAFiTmTbEDCnAJuEju/tbJD7HKVeLDzDwvITAmBfewSZx89 YoWYIyDxbfIhFoheWYlNB5ghjpaUOLjiBssERuEFjAyrGEVTC5ILipPSi4z1ihNzi0vz0vWS 83M3MQIj4vS/Z/07GO8esD7EKMDBqMTDe4M3JkSINbGsuDL3EKMp0IaJzFKiyfnAuMsriTc0 NjOyMDUxNTYytzRTEuddKPUzWEggPbEkNTs1tSC1KL6oNCe1+BAjEwenVAPjunSrwI/FXhae cT3il1ecve3m+l3irvW1OZYzX59STtLaEZgT+envs2kfE6/Fc0q9sHP++Ccw/gLLEpeKJdPZ TPcJs9UEdzgtepPey75J5njvJsNbHhVPY24ExTgZth/fdjz3hFl6zu2VV9XeLb5le78qWrz7 xcyvW1qL16rx3I5bzvXsh9NJJZbijERDLeai4kQAi52F8IMCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrDIsWRmVeSWpSXmKPExsVy+t9jAd2TYTEhBrO3ilr8nXSM3eL9sh5G i/lHzrFarPmrZLHp8TVWixnn9zFZLNr2n9ni1PXPbBb/9+xgt1i16w+jA5fHmnlrGD1+/5rE 6LFz1l12j02rOtk8Ni+p97hyoonV4/MmuQD2qAZGm4zUxJTUIoXUvOT8lMy8dFsl7+B453hT MwNDXUNLC3MlhbzE3FRbJRefAF23zByg85QUyhJzSoFCAYnFxUr6dpgmhIa46VrANEbo+oYE wfUYGaCBhDWMGdMaN7EUbLGtuPbyAFMD4xGDLkZODgkBE4k36z4xQdhiEhfurWfrYuTiEBJY xCjxonUCI0hCSKCPSWLSD2YQm01AT2LBv69gtoiAhsSUrsfsIA3MAp8ZJW6v2soOkhAW8JfY u6KBDcRmEVCVeHagnxXE5hVwleg4fRRoGwfQNgWJOZNsQMKcAm4SO7+1skPscpV4sPMPywRG 3gWMDKsYRVMLkguKk9JzDfWKE3OLS/PS9ZLzczcxgmPumdQOxpUNFocYBTgYlXh4b/LGhAix JpYVV+YeYpTgYFYS4ZUKAgrxpiRWVqUW5ccXleakFh9iNAU6aiKzlGhyPjAd5JXEGxqbmJsa m1qaWJiYWSqJ8x5otQ4UEkhPLEnNTk0tSC2C6WPi4JRqYAyu4rW09SkLl3r75mfLixeSXprN 636UcCgmXZBXqVj2p3iOxHY5j0uPu7wVfRPir+zhTLAueH9FaBI/09W3S2KXLTruGLL1zKSP d8oM5s5PzShe0iRyqjDPTnfprv4/7/57MfZESX+tcTp8f6pjSalXHbumZNHlM8nXhZP7s6eo LM+MabItUWIpzkg01GIuKk4EADGpiMzPAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Naveen Krishna Ch Add initial device tree nodes for EXYNOS7 SoC and board dts file to support Espresso board based on Exynos7 SoC. Signed-off-by: Naveen Krishna Ch Signed-off-by: Abhilash Kesavan Reviewed-by: Thomas Abraham Tested-by: Thomas Abraham Cc: Rob Herring Cc: Catalin Marinas --- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/exynos/Makefile | 5 + arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 39 +++++ arch/arm64/boot/dts/exynos/exynos7.dtsi | 183 +++++++++++++++++++++++ 4 files changed, 228 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/Makefile create mode 100644 arch/arm64/boot/dts/exynos/exynos7-espresso.dts create mode 100644 arch/arm64/boot/dts/exynos/exynos7.dtsi diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index e8efc8f..fdda246 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -1,6 +1,7 @@ dts-dirs += apm dts-dirs += arm dts-dirs += cavium +dts-dirs += exynos always := $(dtb-y) subdir-y := $(dts-dirs) diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile new file mode 100644 index 0000000..20310e5 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_EXYNOS7) += exynos7-espresso.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts new file mode 100644 index 0000000..e2c8283 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts @@ -0,0 +1,39 @@ +/* + * SAMSUNG Exynos7 Espresso board device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos7.dtsi" + +/ { + model = "Samsung Exynos7 Espresso board based on EXYNOS7"; + compatible = "samsung,exynos7-espresso", "samsung,exynos7"; + + aliases { + serial0 = &serial_2; + }; + + chosen { + linux,stdout-path = &serial_2; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0x0 0xC0000000>; + }; +}; + +&fin_pll { + clock-frequency = <24000000>; +}; + +&serial_2 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi new file mode 100644 index 0000000..c4cabc6 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -0,0 +1,183 @@ +/* + * SAMSUNG EXYNOS7 SoC device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +/ { + compatible = "samsung,exynos7"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x1>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x2>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x3>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + soc: soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0x18000000>; + + chipid@10000000 { + compatible = "samsung,exynos4210-chipid"; + reg = <0x10000000 0x100>; + }; + + fin_pll: xxti { + compatible = "fixed-clock"; + clock-output-names = "fin_pll"; + #clock-cells = <0>; + }; + + gic: interrupt-controller@11001000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x11001000 0x1000>, + <0x11002000 0x1000>, + <0x11004000 0x2000>, + <0x11006000 0x2000>; + }; + + clock_topc: clock-controller@10570000 { + compatible = "samsung,exynos7-clock-topc"; + reg = <0x10570000 0x10000>; + #clock-cells = <1>; + }; + + clock_top0: clock-controller@105d0000 { + compatible = "samsung,exynos7-clock-top0"; + reg = <0x105d0000 0xb000>; + #clock-cells = <1>; + clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>, + <&clock_topc DOUT_SCLK_BUS1_PLL>, + <&clock_topc DOUT_SCLK_CC_PLL>, + <&clock_topc DOUT_SCLK_MFC_PLL>; + clock-names = "fin_pll", "dout_sclk_bus0_pll", + "dout_sclk_bus1_pll", "dout_sclk_cc_pll", + "dout_sclk_mfc_pll"; + }; + + clock_peric0: clock-controller@13610000 { + compatible = "samsung,exynos7-clock-peric0"; + reg = <0x13610000 0xd00>; + #clock-cells = <1>; + clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC0>, + <&clock_top0 CLK_SCLK_UART0>; + clock-names = "fin_pll", "dout_aclk_peric0_66", + "sclk_uart0"; + }; + + clock_peric1: clock-controller@14c80000 { + compatible = "samsung,exynos7-clock-peric1"; + reg = <0x14c80000 0xd00>; + #clock-cells = <1>; + clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC1>, + <&clock_top0 CLK_SCLK_UART1>, + <&clock_top0 CLK_SCLK_UART2>, + <&clock_top0 CLK_SCLK_UART3>; + clock-names = "fin_pll", "dout_aclk_peric1_66", + "sclk_uart1", "sclk_uart2", "sclk_uart3"; + }; + + clock_peris: clock-controller@10040000 { + compatible = "samsung,exynos7-clock-peris"; + reg = <0x10040000 0xd00>; + #clock-cells = <1>; + clocks = <&fin_pll>, <&clock_topc DOUT_ACLK_PERIS>; + clock-names = "fin_pll", "dout_aclk_peris_66"; + }; + + serial_0: serial@13630000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13630000 0x100>; + interrupts = <0 440 0>; + clocks = <&clock_peric0 PCLK_UART0>, + <&clock_peric0 SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial_1: serial@14c20000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x14c20000 0x100>; + interrupts = <0 456 0>; + clocks = <&clock_peric1 PCLK_UART1>, + <&clock_peric1 SCLK_UART1>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial_2: serial@14c30000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x14c30000 0x100>; + interrupts = <0 457 0>; + clocks = <&clock_peric1 PCLK_UART2>, + <&clock_peric1 SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial_3: serial@14c40000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x14c40000 0x100>; + interrupts = <0 458 0>; + clocks = <&clock_peric1 PCLK_UART3>, + <&clock_peric1 SCLK_UART3>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xff01>, + <1 14 0xff01>, + <1 11 0xff01>, + <1 10 0xff01>; + }; + }; +};