| Message ID | 1416834177-11170-1-git-send-email-gautam.vivek@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Vivek, On Mon, Nov 24, 2014 at 6:32 PM, Vivek Gautam <gautam.vivek@samsung.com> wrote: > USB and Power regulator on Exynos7 require gpios available > in BUS1 pin controller block. > So adding the BUS1 pinctrl support. > > Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> > Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> > Cc: Linus Walleij <linus.walleij@linaro.org> > --- Looks good to me. Thanks! Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> > > This patch was part of series: > "[PATCH 00/11] Exynos7: Adding USB 3.0 support" > https://lkml.org/lkml/2014/11/21/247 > > Changes since V1: > - Added support for all pin banks which are part of BUS1 pin controller. > > drivers/pinctrl/samsung/pinctrl-exynos.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c > index d5d4cfc..44e60dc 100644 > --- a/drivers/pinctrl/samsung/pinctrl-exynos.c > +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c > @@ -1300,6 +1300,20 @@ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = { > EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c), > }; > > +/* pin banks of exynos7 pin-controller - BUS1 */ > +static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = { > + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00), > + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04), > + EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08), > + EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpf3", 0x0c), > + EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10), > + EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf5", 0x14), > + EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpg1", 0x18), > + EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpg2", 0x1c), > + EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20), > + EXYNOS_PIN_BANK_EINTG(3, 0x140, "gpv6", 0x24), > +}; > + > const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = { > { > /* pin-controller instance 0 Alive data */ > @@ -1342,5 +1356,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = { > .pin_banks = exynos7_pin_banks7, > .nr_banks = ARRAY_SIZE(exynos7_pin_banks7), > .eint_gpio_init = exynos_eint_gpio_init, > + }, { > + /* pin-controller instance 8 BUS1 data */ > + .pin_banks = exynos7_pin_banks8, > + .nr_banks = ARRAY_SIZE(exynos7_pin_banks8), > + .eint_gpio_init = exynos_eint_gpio_init, > }, > }; > -- > 1.7.10.4 > > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Alim, On Wed, Nov 26, 2014 at 7:03 PM, Alim Akhtar <alim.akhtar@gmail.com> wrote: > Hi Vivek, > > On Mon, Nov 24, 2014 at 6:32 PM, Vivek Gautam <gautam.vivek@samsung.com> wrote: >> USB and Power regulator on Exynos7 require gpios available >> in BUS1 pin controller block. >> So adding the BUS1 pinctrl support. >> >> Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> >> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> >> Cc: Linus Walleij <linus.walleij@linaro.org> >> --- > Looks good to me. > Thanks! > > Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Thanks for the review. > >> >> This patch was part of series: >> "[PATCH 00/11] Exynos7: Adding USB 3.0 support" >> https://lkml.org/lkml/2014/11/21/247 >> >> Changes since V1: >> - Added support for all pin banks which are part of BUS1 pin controller. >> >> drivers/pinctrl/samsung/pinctrl-exynos.c | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) >> >> diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c >> index d5d4cfc..44e60dc 100644 >> --- a/drivers/pinctrl/samsung/pinctrl-exynos.c >> +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c >> @@ -1300,6 +1300,20 @@ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = { >> EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c), >> }; >> >> +/* pin banks of exynos7 pin-controller - BUS1 */ >> +static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = { >> + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00), >> + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04), >> + EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08), >> + EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpf3", 0x0c), >> + EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10), >> + EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf5", 0x14), >> + EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpg1", 0x18), >> + EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpg2", 0x1c), >> + EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20), >> + EXYNOS_PIN_BANK_EINTG(3, 0x140, "gpv6", 0x24), >> +}; >> + >> const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = { >> { >> /* pin-controller instance 0 Alive data */ >> @@ -1342,5 +1356,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = { >> .pin_banks = exynos7_pin_banks7, >> .nr_banks = ARRAY_SIZE(exynos7_pin_banks7), >> .eint_gpio_init = exynos_eint_gpio_init, >> + }, { >> + /* pin-controller instance 8 BUS1 data */ >> + .pin_banks = exynos7_pin_banks8, >> + .nr_banks = ARRAY_SIZE(exynos7_pin_banks8), >> + .eint_gpio_init = exynos_eint_gpio_init, >> }, >> }; >> -- >> 1.7.10.4 >> >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in >> the body of a message to majordomo@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html > > > > -- > Regards, > Alim > -- > To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Linus, On Fri, Nov 28, 2014 at 9:05 AM, Vivek Gautam <gautamvivek1987@gmail.com> wrote: > Hi Alim, > > > On Wed, Nov 26, 2014 at 7:03 PM, Alim Akhtar <alim.akhtar@gmail.com> wrote: >> Hi Vivek, >> >> On Mon, Nov 24, 2014 at 6:32 PM, Vivek Gautam <gautam.vivek@samsung.com> wrote: >>> USB and Power regulator on Exynos7 require gpios available >>> in BUS1 pin controller block. >>> So adding the BUS1 pinctrl support. >>> >>> Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> >>> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> >>> Cc: Linus Walleij <linus.walleij@linaro.org> If the change looks good, will it be possible to pick it fo 3.19-rc1 ? That will really help enabling USB IP on exynos7. >>> --- >> Looks good to me. >> Thanks! >> >> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> > > Thanks for the review. > >> >>> >>> This patch was part of series: >>> "[PATCH 00/11] Exynos7: Adding USB 3.0 support" >>> https://lkml.org/lkml/2014/11/21/247 >>> >>> Changes since V1: >>> - Added support for all pin banks which are part of BUS1 pin controller. >>> >>> drivers/pinctrl/samsung/pinctrl-exynos.c | 19 +++++++++++++++++++ >>> 1 file changed, 19 insertions(+) >>> >>> diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c >>> index d5d4cfc..44e60dc 100644 >>> --- a/drivers/pinctrl/samsung/pinctrl-exynos.c >>> +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c >>> @@ -1300,6 +1300,20 @@ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = { >>> EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c), >>> }; >>> >>> +/* pin banks of exynos7 pin-controller - BUS1 */ >>> +static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = { >>> + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00), >>> + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04), >>> + EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08), >>> + EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpf3", 0x0c), >>> + EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10), >>> + EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf5", 0x14), >>> + EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpg1", 0x18), >>> + EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpg2", 0x1c), >>> + EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20), >>> + EXYNOS_PIN_BANK_EINTG(3, 0x140, "gpv6", 0x24), >>> +}; >>> + >>> const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = { >>> { >>> /* pin-controller instance 0 Alive data */ >>> @@ -1342,5 +1356,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = { >>> .pin_banks = exynos7_pin_banks7, >>> .nr_banks = ARRAY_SIZE(exynos7_pin_banks7), >>> .eint_gpio_init = exynos_eint_gpio_init, >>> + }, { >>> + /* pin-controller instance 8 BUS1 data */ >>> + .pin_banks = exynos7_pin_banks8, >>> + .nr_banks = ARRAY_SIZE(exynos7_pin_banks8), >>> + .eint_gpio_init = exynos_eint_gpio_init, >>> }, >>> }; >>> -- >>> 1.7.10.4 >>> >>> -- >>> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in >>> the body of a message to majordomo@vger.kernel.org >>> More majordomo info at http://vger.kernel.org/majordomo-info.html >> >> >> >> -- >> Regards, >> Alim >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in >> the body of a message to majordomo@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html > > > > -- > Best Regards > Vivek Gautam > Samsung R&D Institute, Bangalore > India
On Fri, Nov 28, 2014 at 4:39 AM, Vivek Gautam <gautamvivek1987@gmail.com> wrote: > On Fri, Nov 28, 2014 at 9:05 AM, Vivek Gautam <gautamvivek1987@gmail.com> wrote: >>> On Mon, Nov 24, 2014 at 6:32 PM, Vivek Gautam <gautam.vivek@samsung.com> wrote: >>>> USB and Power regulator on Exynos7 require gpios available >>>> in BUS1 pin controller block. >>>> So adding the BUS1 pinctrl support. >>>> >>>> Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> >>>> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> >>>> Cc: Linus Walleij <linus.walleij@linaro.org> > > If the change looks good, will it be possible to pick it fo 3.19-rc1 ? > That will really help enabling USB IP on exynos7. As you know the Exynos driver has a maintainer, Tomasz Figa, I will not merge patches without his ACK. Apart from that, there are *again* a lot of Exynos patches flying around and I start to loose track of them. If they do not apply together and start to conflict I will just ask Tomasz to stack them and provide a pull request again. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Nov 28, 2014 at 9:15 PM, Linus Walleij <linus.walleij@linaro.org> wrote: > On Fri, Nov 28, 2014 at 4:39 AM, Vivek Gautam <gautamvivek1987@gmail.com> wrote: >> On Fri, Nov 28, 2014 at 9:05 AM, Vivek Gautam <gautamvivek1987@gmail.com> wrote: > >>>> On Mon, Nov 24, 2014 at 6:32 PM, Vivek Gautam <gautam.vivek@samsung.com> wrote: >>>>> USB and Power regulator on Exynos7 require gpios available >>>>> in BUS1 pin controller block. >>>>> So adding the BUS1 pinctrl support. >>>>> >>>>> Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> >>>>> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> >>>>> Cc: Linus Walleij <linus.walleij@linaro.org> >> >> If the change looks good, will it be possible to pick it fo 3.19-rc1 ? >> That will really help enabling USB IP on exynos7. > > As you know the Exynos driver has a maintainer, Tomasz Figa, I will not > merge patches without his ACK. > > Apart from that, there are *again* a lot of Exynos patches flying around and > I start to loose track of them. If they do not apply together and start to > conflict I will just ask Tomasz to stack them and provide a pull request > again. True, this merge cycle has surely got number of exynos7 related patches in flight, which are difficult to keep track of. Thanks for asking Tomasz.
Hi Vivek, Please see my comments below. 2014-11-24 22:02 GMT+09:00 Vivek Gautam <gautam.vivek@samsung.com>: > USB and Power regulator on Exynos7 require gpios available > in BUS1 pin controller block. > So adding the BUS1 pinctrl support. > > Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> > Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> > Cc: Linus Walleij <linus.walleij@linaro.org> > --- > > This patch was part of series: > "[PATCH 00/11] Exynos7: Adding USB 3.0 support" > https://lkml.org/lkml/2014/11/21/247 > > Changes since V1: > - Added support for all pin banks which are part of BUS1 pin controller. > > drivers/pinctrl/samsung/pinctrl-exynos.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) I have missed this with previous patch, but DT bindings documentation should list all aliases for all supported compatible strings, because they are required for correct operation. There is a small section about aliases in [1] already, so please add there information about aliases for Exynos7 pin controllers along with their names, e.g. Aliases for controllers compatible with "samsung,exynos7-pinctrl": - pinctrl0: pin controller of ALIVE block, - pinctrl1: pin controller of BUS0 block, [...] - pinctrl8: pin controller of BUS1 block. [1] Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt I guess you can do this in separate patch or respin this one with this added. Best regards, Tomasz -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Dec 1, 2014 at 3:21 PM, Vivek Gautam <gautamvivek1987@gmail.com> wrote: > On Fri, Nov 28, 2014 at 9:15 PM, Linus Walleij <linus.walleij@linaro.org> wrote: >> Apart from that, there are *again* a lot of Exynos patches flying around and >> I start to loose track of them. If they do not apply together and start to >> conflict I will just ask Tomasz to stack them and provide a pull request >> again. > > True, this merge cycle has surely got number of exynos7 related > patches in flight, > which are difficult to keep track of. > Thanks for asking Tomasz. I will probably not take any more Exynos patches for this merge cycle and ask Tomasz to queue the Exynos pinctrl patches for v3.20 after v3.19 merge cycle is complete, so make sure to include Tomasz on reviews. Tomasz: OK? Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Tomasz, On Mon, Dec 1, 2014 at 9:37 PM, Tomasz Figa <tomasz.figa@gmail.com> wrote: > Hi Vivek, > > Please see my comments below. > > 2014-11-24 22:02 GMT+09:00 Vivek Gautam <gautam.vivek@samsung.com>: >> USB and Power regulator on Exynos7 require gpios available >> in BUS1 pin controller block. >> So adding the BUS1 pinctrl support. >> >> Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> >> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> >> Cc: Linus Walleij <linus.walleij@linaro.org> >> --- >> >> This patch was part of series: >> "[PATCH 00/11] Exynos7: Adding USB 3.0 support" >> https://lkml.org/lkml/2014/11/21/247 >> >> Changes since V1: >> - Added support for all pin banks which are part of BUS1 pin controller. >> >> drivers/pinctrl/samsung/pinctrl-exynos.c | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) > > I have missed this with previous patch, but DT bindings documentation > should list all aliases for all supported compatible strings, because > they are required for correct operation. There is a small section > about aliases in [1] already, so please add there information about > aliases for Exynos7 pin controllers along with their names, e.g. > > Aliases for controllers compatible with "samsung,exynos7-pinctrl": > - pinctrl0: pin controller of ALIVE block, > - pinctrl1: pin controller of BUS0 block, > [...] > - pinctrl8: pin controller of BUS1 block. > > [1] Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt > > I guess you can do this in separate patch or respin this one with this added. Sure, i will add the aliases in a separate patch. I missed to update the patch in this cycle :-( So we can queue up the reworked version for 3.20.
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index d5d4cfc..44e60dc 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -1300,6 +1300,20 @@ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = { EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c), }; +/* pin banks of exynos7 pin-controller - BUS1 */ +static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = { + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00), + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04), + EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08), + EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpf3", 0x0c), + EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10), + EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf5", 0x14), + EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpg1", 0x18), + EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpg2", 0x1c), + EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20), + EXYNOS_PIN_BANK_EINTG(3, 0x140, "gpv6", 0x24), +}; + const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = { { /* pin-controller instance 0 Alive data */ @@ -1342,5 +1356,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = { .pin_banks = exynos7_pin_banks7, .nr_banks = ARRAY_SIZE(exynos7_pin_banks7), .eint_gpio_init = exynos_eint_gpio_init, + }, { + /* pin-controller instance 8 BUS1 data */ + .pin_banks = exynos7_pin_banks8, + .nr_banks = ARRAY_SIZE(exynos7_pin_banks8), + .eint_gpio_init = exynos_eint_gpio_init, }, };