From patchwork Thu Jan 22 21:54:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 5688881 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1D062C058D for ; Thu, 22 Jan 2015 21:54:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 415162026F for ; Thu, 22 Jan 2015 21:54:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6777920251 for ; Thu, 22 Jan 2015 21:54:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752925AbbAVVyc (ORCPT ); Thu, 22 Jan 2015 16:54:32 -0500 Received: from mail.kernel.org ([198.145.29.136]:46960 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754297AbbAVVyb (ORCPT ); Thu, 22 Jan 2015 16:54:31 -0500 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7009220256; Thu, 22 Jan 2015 21:54:30 +0000 (UTC) Received: from localhost (c-67-160-101-93.hsd1.wa.comcast.net [67.160.101.93]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 45FA420251; Thu, 22 Jan 2015 21:54:29 +0000 (UTC) From: Kevin Hilman To: Kukjin Kim , linux-samsung-soc@vger.kernel.org Cc: linaro-kernel@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Javier Martinez Canillas , Sjoerd Simons , Kevin Hilman , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Kukjin Kim , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND...), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3] ARM: dts: exynos5422-odroidxu3: add on-board INA231 sensors Date: Thu, 22 Jan 2015 13:54:28 -0800 Message-Id: <1421963668-28359-1-git-send-email-khilman@kernel.org> X-Mailer: git-send-email 2.1.3 X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kevin Hilman The odroid-xu3 has 4 INA231 current sensors on board which can be accessed from the Linux via the hwmon interface. There is one sensor for each of these power rails: - A15 cluster: VDD_ARM - A7 cluster: VDD_KFC - GPU: VDD_G3D - memory: VDD_MEM In addition to adding the sensors, LDO26 from the PMIC needs to be enabled because it's powering these sensor. Cc: Javier Martinez Canillas Cc: Sjoerd Simons Reviewed-By: Sjoerd Simons Signed-off-by: Kevin Hilman --- v3: extend existing i2c_0 node v2: use "ti,ina231" as compatible string. Applies on top of "ARM: dts: Add dts file for odroid XU3 board" from Sjoerd Simons. arch/arm/boot/dts/exynos5422-odroidxu3.dts | 39 ++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts index c29123c0734d..38694a4a5417 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts @@ -174,6 +174,13 @@ regulator-always-on; }; + ldo26_reg: LDO26 { + regulator-name = "vdd_ldo26"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + buck1_reg: BUCK1 { regulator-name = "vdd_mif"; regulator-min-microvolt = <800000>; @@ -330,3 +337,35 @@ &usbdrd_dwc3_1 { dr_mode = "otg"; }; + +&i2c_0 { + status = "okay"; + + /* A15 cluster: VDD_ARM */ + ina231@40 { + compatible = "ti,ina231"; + reg = <0x40>; + shunt-resistor = <10000>; + }; + + /* memory: VDD_MEM */ + ina231@41 { + compatible = "ti,ina231"; + reg = <0x41>; + shunt-resistor = <10000>; + }; + + /* GPU: VDD_G3D */ + ina231@44 { + compatible = "ti,ina231"; + reg = <0x44>; + shunt-resistor = <10000>; + }; + + /* A7 cluster: VDD_KFC */ + ina231@45 { + compatible = "ti,ina231"; + reg = <0x45>; + shunt-resistor = <10000>; + }; +};