| Message ID | 1422439819-29854-6-git-send-email-javier.martinez@collabora.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 01/28/15 11:10, Javier Martinez Canillas wrote: > The Snow board has a MMC/SDIO wifi chip that is always powered but it > needs a power sequence involving a reset (active low) and an enable > (active high) pins. Both pins are marked as active low since the MMC > simple power sequence driver asserts the pins prior to the card power > up procedure and de-asserts the pins after the card has been powered. > > So the reset line will be left de-asserted and the enable pin will be > left asserted. > > The chip also needs an external 32kHz reference clock to be operational > that is by the MAX77686 PMIC clock. > > Add a simple MMC power sequence provider for the wifi MMC/SDIO slot. > > Signed-off-by: Javier Martinez Canillas<javier.martinez@collabora.co.uk> > --- > arch/arm/boot/dts/exynos5250-snow.dts | 25 ++++++++++++++++++++++++- > 1 file changed, 24 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts > index b9aeec430527..0f7971ba8238 100644 > --- a/arch/arm/boot/dts/exynos5250-snow.dts > +++ b/arch/arm/boot/dts/exynos5250-snow.dts > @@ -229,6 +229,13 @@ > power-supply =<&fet6>; > backlight =<&backlight>; > }; > + > + mmc3_pwrseq: mmc3_pwrseq { > + reset-gpios =<&gpx0 2 GPIO_ACTIVE_LOW>, /* WIFI_RSTn */ > + <&gpx0 1 GPIO_ACTIVE_LOW>; /* WIFI_EN */ > + clocks =<&max77686 MAX77686_CLK_PMIC>; > + clock-names = "ext_clock"; > + }; > }; > > &dp { > @@ -531,17 +538,33 @@ > status = "okay"; > num-slots =<1>; > broken-cd; > + cap-sdio-irq; This seems like an unrelated change, right? Regards, Arend > card-detect-delay =<200>; > samsung,dw-mshc-ciu-div =<3>; > samsung,dw-mshc-sdr-timing =<2 3>; > samsung,dw-mshc-ddr-timing =<1 2>; > pinctrl-names = "default"; > - pinctrl-0 =<&sd3_clk&sd3_cmd&sd3_bus4>; > + pinctrl-0 =<&sd3_clk&sd3_cmd&sd3_bus4&wifi_en&wifi_rst>; > bus-width =<4>; > cap-sd-highspeed; > + mmc-pwrseq =<&mmc3_pwrseq>; > }; > > &pinctrl_0 { > + wifi_en: wifi-en { > + samsung,pins = "gpx0-1"; > + samsung,pin-function =<1>; > + samsung,pin-pud =<0>; > + samsung,pin-drv =<0>; > + }; > + > + wifi_rst: wifi-rst { > + samsung,pins = "gpx0-2"; > + samsung,pin-function =<1>; > + samsung,pin-pud =<0>; > + samsung,pin-drv =<0>; > + }; > + > power_key_irq: power-key-irq { > samsung,pins = "gpx1-3"; > samsung,pin-function =<0xf>; -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello Arend, Thanks for your feedback. On 01/28/2015 03:03 PM, Arend van Spriel wrote: > On 01/28/15 11:10, Javier Martinez Canillas wrote: >> &dp { >> @@ -531,17 +538,33 @@ >> status = "okay"; >> num-slots =<1>; >> broken-cd; >> + cap-sdio-irq; > > This seems like an unrelated change, right? > Well, I found that enabling the SDIO IRQ signalling I had the double of the transfer rate and I didn't think it justified a separate patch but you are right and I'll split on v2. > Regards, > Arend > Best regards, Javier -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index b9aeec430527..0f7971ba8238 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -229,6 +229,13 @@ power-supply = <&fet6>; backlight = <&backlight>; }; + + mmc3_pwrseq: mmc3_pwrseq { + reset-gpios = <&gpx0 2 GPIO_ACTIVE_LOW>, /* WIFI_RSTn */ + <&gpx0 1 GPIO_ACTIVE_LOW>; /* WIFI_EN */ + clocks = <&max77686 MAX77686_CLK_PMIC>; + clock-names = "ext_clock"; + }; }; &dp { @@ -531,17 +538,33 @@ status = "okay"; num-slots = <1>; broken-cd; + cap-sdio-irq; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <2 3>; samsung,dw-mshc-ddr-timing = <1 2>; pinctrl-names = "default"; - pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>; + pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4 &wifi_en &wifi_rst>; bus-width = <4>; cap-sd-highspeed; + mmc-pwrseq = <&mmc3_pwrseq>; }; &pinctrl_0 { + wifi_en: wifi-en { + samsung,pins = "gpx0-1"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + wifi_rst: wifi-rst { + samsung,pins = "gpx0-2"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + power_key_irq: power-key-irq { samsung,pins = "gpx1-3"; samsung,pin-function = <0xf>;
The Snow board has a MMC/SDIO wifi chip that is always powered but it needs a power sequence involving a reset (active low) and an enable (active high) pins. Both pins are marked as active low since the MMC simple power sequence driver asserts the pins prior to the card power up procedure and de-asserts the pins after the card has been powered. So the reset line will be left de-asserted and the enable pin will be left asserted. The chip also needs an external 32kHz reference clock to be operational that is by the MAX77686 PMIC clock. Add a simple MMC power sequence provider for the wifi MMC/SDIO slot. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> --- arch/arm/boot/dts/exynos5250-snow.dts | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-)