From patchwork Thu Apr 2 08:06:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 6144921 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D4D889F1BE for ; Thu, 2 Apr 2015 08:06:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 04F3B2035B for ; Thu, 2 Apr 2015 08:06:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B534020351 for ; Thu, 2 Apr 2015 08:06:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752564AbbDBIGk (ORCPT ); Thu, 2 Apr 2015 04:06:40 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:37289 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752353AbbDBIGg (ORCPT ); Thu, 2 Apr 2015 04:06:36 -0400 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NM60038F6PQKT30@mailout1.w1.samsung.com>; Thu, 02 Apr 2015 09:10:38 +0100 (BST) X-AuditID: cbfec7f4-b7f126d000001e9a-a8-551cf7dca124 Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 7B.19.07834.CD7FC155; Thu, 02 Apr 2015 09:03:40 +0100 (BST) Received: from AMDC1943.digital.local ([106.116.151.171]) by eusync4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NM6001YK6ITAI90@eusync4.samsung.com>; Thu, 02 Apr 2015 09:06:32 +0100 (BST) From: Krzysztof Kozlowski To: Kukjin Kim , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Javier Martinez Canillas , Marek Szyprowski , Krzysztof Kozlowski Subject: [PATCH 2/2] ARM: dts: Use last parent for clocks during power domain on/off Date: Thu, 02 Apr 2015 10:06:19 +0200 Message-id: <1427961979-29477-2-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1427961979-29477-1-git-send-email-k.kozlowski@samsung.com> References: <1427961979-29477-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrBJMWRmVeSWpSXmKPExsVy+t/xa7p3vsuEGnS9NLGYf+Qcq8XR3wUW r18YWvQ/fs1ssenxNVaLy7vmsFnMOL+PyWLtkbvsDhwef59fZ/HYtKqTzWPzknqPvi2rGD0+ b5ILYI3isklJzcksSy3St0vgyjj7ZT9bwSfeiref77E0MG7k7mLk5JAQMJHofbGEHcIWk7hw bz1bFyMXh5DAUkaJy9fPskM4fUwS3bMOMYNUsQkYS2xevoQNxBYRWMEocbHJEqSIWWAeo8Sx PwvAEsICYRJvJtxhBLFZBFQlzrQ3AdkcHLwC7hKXT5hDbJOTOHlsMiuIzSngIfHgxH0WEFsI qOTlzoesExh5FzAyrGIUTS1NLihOSs811CtOzC0uzUvXS87P3cQICa0vOxgXH7M6xCjAwajE w3vjk3SoEGtiWXFl7iFGCQ5mJRHe/HsyoUK8KYmVValF+fFFpTmpxYcYmTg4pRoYW5mbPmUy JwbaavOcU1Sc1OKYxOD4w+SMgqZB54ret3/SWcUCi4P/+2+Yxy1W3vfnb8H5siY2vpZZnumv tqeUHHow459D+514X/Nuuf1/U49un6AecUhF4eryFRtLqjgkJ6m/Wzfr8UfPkNmy60z4ih6p 6ac2f9o49wj/hh8SH4/p/ZbX1spQYinOSDTUYi4qTgQAm5MpSgsCAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Replace fixed parent with last parent (obtained with clk_get_parent()) of clocks for devices in mfc and disp power domains. This should improve behavior if such clocks were reparented by the drivers and new parents are different than those specified in DTS. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas --- arch/arm/boot/dts/exynos5420.dtsi | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index c7a44ee0ce06..b9b99305991b 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -264,9 +264,8 @@ mfc_pd: power-domain@10044060 { compatible = "samsung,exynos4210-pd"; reg = <0x10044060 0x20>; - clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>, - <&clock CLK_MOUT_USER_ACLK333>; - clock-names = "oscclk", "pclk0", "clk0"; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>; + clock-names = "oscclk", "clk0"; #power-domain-cells = <0>; }; @@ -280,16 +279,12 @@ compatible = "samsung,exynos4210-pd"; reg = <0x100440C0 0x20>; #power-domain-cells = <0>; - clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK200>, + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK200_DISP1>, - <&clock CLK_MOUT_SW_ACLK300>, <&clock CLK_MOUT_USER_ACLK300_DISP1>, - <&clock CLK_MOUT_SW_ACLK400>, <&clock CLK_MOUT_USER_ACLK400_DISP1>, <&clock CLK_FIMD1>, <&clock CLK_MIXER>; - clock-names = "oscclk", "pclk0", "clk0", - "pclk1", "clk1", "pclk2", "clk2", - "asb0", "asb1"; + clock-names = "oscclk", "clk0", "clk1", "clk2", "asb0", "asb1"; }; pinctrl_0: pinctrl@13400000 {