From patchwork Sun Apr 12 12:24:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 6202991 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 664A79F1AC for ; Sun, 12 Apr 2015 12:26:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7F7A520270 for ; Sun, 12 Apr 2015 12:26:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 75F7520265 for ; Sun, 12 Apr 2015 12:26:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751152AbbDLMZg (ORCPT ); Sun, 12 Apr 2015 08:25:36 -0400 Received: from mail-pa0-f52.google.com ([209.85.220.52]:33901 "EHLO mail-pa0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751401AbbDLMZd (ORCPT ); Sun, 12 Apr 2015 08:25:33 -0400 Received: by pacyx8 with SMTP id yx8so72753892pac.1; Sun, 12 Apr 2015 05:25:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hMq2fujYzsQO1v2ZnPKS+x12PyoqTRAHSZ95+XRZp4U=; b=plVXGZ2bH+wKjr78YcXl4r1hDAo0qJOrGqlm9+pYzUhDWaOAefoA4QYnGHksPbMlJZ vLFz90XzoljkTGgeEwg7zIRQlfVJbffw4mwQhBvFL4QvA383OklsB0igYQ7XbVJyMmTI K69mMkLdTJrPV5aJ6jC7AC9hOtI/KF+NK+wlvF2PfmTWrZIun5gyO9p4SM4hD58Zj/gA WFiiNTSTAaPEd3IaLNJ8BKc9CejKL5uJcjSPrOujsyjGew+J8Y0Xj40u8rxWA2zqH3Xa Lsaf9F8+hlRiacMtQVgppwUbn5Jb+COtCw1PAtqncRXvEEDQmzrXb3kpk54qY+5jhpUU x1OQ== X-Received: by 10.70.5.68 with SMTP id q4mr18096172pdq.9.1428841532787; Sun, 12 Apr 2015 05:25:32 -0700 (PDT) Received: from localhost.localdomain ([125.130.175.98]) by mx.google.com with ESMTPSA id jc9sm4276197pbd.54.2015.04.12.05.25.27 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 12 Apr 2015 05:25:32 -0700 (PDT) From: Krzysztof Kozlowski To: Kukjin Kim , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Arnd Bergmann , Olof Johansson , Marek Szyprowski , Krzysztof Kozlowski Subject: [PATCH 5/7] ARM: dts: Use phandle notation for overriding nodes in Exynos5420 Date: Sun, 12 Apr 2015 21:24:52 +0900 Message-Id: <1428841494-20769-6-git-send-email-k.kozlowski.k@gmail.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1428841494-20769-1-git-send-email-k.kozlowski.k@gmail.com> References: <1428841494-20769-1-git-send-email-k.kozlowski.k@gmail.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The phandle notation reduces possible mistakes when overriding nodes. Additionally remove duplicated serial and uart labels for serial. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-peach-pit.dts | 2 +- arch/arm/boot/dts/exynos5420.dtsi | 80 +++++++++++++++--------------- arch/arm/boot/dts/exynos5800-peach-pi.dts | 2 +- 3 files changed, 42 insertions(+), 42 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index 3f4e2feaa927..9d199ce01314 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -1024,7 +1024,7 @@ }; }; -&uart_3 { +&serial_3 { status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index c7a44ee0ce06..25228527294c 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -328,13 +328,6 @@ interrupts = <0 47 0>; }; - rtc: rtc@101E0000 { - clocks = <&clock CLK_RTC>; - clock-names = "rtc"; - interrupt-parent = <&pmu_system_controller>; - status = "disabled"; - }; - amba { #address-cells = <1>; #size-cells = <1>; @@ -496,26 +489,6 @@ status = "disabled"; }; - uart_0: serial@12C00000 { - clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; - clock-names = "uart", "clk_uart_baud0"; - }; - - uart_1: serial@12C10000 { - clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; - clock-names = "uart", "clk_uart_baud0"; - }; - - uart_2: serial@12C20000 { - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; - clock-names = "uart", "clk_uart_baud0"; - }; - - uart_3: serial@12C30000 { - clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; - clock-names = "uart", "clk_uart_baud0"; - }; - pwm: pwm@12dd0000 { compatible = "samsung,exynos4210-pwm"; reg = <0x12dd0000 0x100>; @@ -531,13 +504,6 @@ #phy-cells = <0>; }; - dp: dp-controller@145B0000 { - clocks = <&clock CLK_DP1>; - clock-names = "dp"; - phys = <&dp_phy>; - phy-names = "dp"; - }; - mipi_phy: video-phy@10040714 { compatible = "samsung,s5pv210-mipi-video-phy"; reg = <0x10040714 12>; @@ -557,12 +523,6 @@ status = "disabled"; }; - fimd: fimd@14400000 { - clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; - clock-names = "sclk_fimd", "fimd"; - power-domains = <&disp_pd>; - }; - adc: adc@12D10000 { compatible = "samsung,exynos-adc-v2"; reg = <0x12D10000 0x100>; @@ -962,3 +922,43 @@ samsung,pmureg-phandle = <&pmu_system_controller>; }; }; + +&dp { + clocks = <&clock CLK_DP1>; + clock-names = "dp"; + phys = <&dp_phy>; + phy-names = "dp"; +}; + +&fimd { + clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; + clock-names = "sclk_fimd", "fimd"; + power-domains = <&disp_pd>; +}; + +&rtc { + clocks = <&clock CLK_RTC>; + clock-names = "rtc"; + interrupt-parent = <&pmu_system_controller>; + status = "disabled"; +}; + +&serial_0 { + clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; +}; + +&serial_1 { + clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; + clock-names = "uart", "clk_uart_baud0"; +}; + +&serial_2 { + clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; +}; + +&serial_3 { + clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; + clock-names = "uart", "clk_uart_baud0"; +}; diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index c833bacf873b..9d26abd88dfd 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -986,7 +986,7 @@ }; }; -&uart_3 { +&serial_3 { status = "okay"; };