From patchwork Tue Apr 21 13:17:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 6248641 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B7549BF4A6 for ; Tue, 21 Apr 2015 13:19:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CD48F20295 for ; Tue, 21 Apr 2015 13:19:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C0743202EC for ; Tue, 21 Apr 2015 13:19:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755458AbbDUNTQ (ORCPT ); Tue, 21 Apr 2015 09:19:16 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:54106 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751027AbbDUNTO (ORCPT ); Tue, 21 Apr 2015 09:19:14 -0400 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NN500LW2RO0RL00@mailout4.samsung.com>; Tue, 21 Apr 2015 22:19:12 +0900 (KST) X-AuditID: cbfee61b-f79536d000000f1f-5a-55364e4f24fd Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 33.77.03871.F4E46355; Tue, 21 Apr 2015 22:19:11 +0900 (KST) Received: from amdc1032.digital.local ([106.116.147.136]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NN500HX0RM5PL00@mmp2.samsung.com>; Tue, 21 Apr 2015 22:19:11 +0900 (KST) From: Bartlomiej Zolnierkiewicz To: Thomas Abraham , Sylwester Nawrocki , Mike Turquette , Kukjin Kim , Kukjin Kim , Viresh Kumar Cc: Tomasz Figa , Lukasz Majewski , Heiko Stuebner , Chanwoo Choi , Kevin Hilman , Javier Martinez Canillas , linux-samsung-soc@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com, Doug Anderson , Andreas Faerber , Sachin Kamat Subject: [PATCH 4/8] ARM: dts: Exynos5420: add CPU OPP and regulator supply property Date: Tue, 21 Apr 2015 15:17:54 +0200 Message-id: <1429622278-12216-5-git-send-email-b.zolnierkie@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1429622278-12216-1-git-send-email-b.zolnierkie@samsung.com> References: <1429622278-12216-1-git-send-email-b.zolnierkie@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrJLMWRmVeSWpSXmKPExsVy+t9jQV1/P7NQg4WLbSyaNxVbbJyxntXi +pfnrBZnlx1ks/j/6DWrxdHfBRa9C66yWfQ/fs1s8fXwCkaLNw83M1psenyN1eLyrjlsFp97 jzBazDi/j8ni6YSLbBaH37SzWpz808to0bGM0WLVrj+MFhu/ejiIeMxuuMji8ff5dRaPnbPu sntsWtXJ5nHn2h42j81L6j36tqxi9Nh+bR6zx+bT1R6fN8kFcEVx2aSk5mSWpRbp2yVwZbyb vo2x4JJExdppk9kaGK8KdTFyckgImEj0HFnGDmGLSVy4t56ti5GLQ0hgOqPEgs89UM5vRomu 9j9MIFVsAlYSE9tXMYIkRAQ+MEq8fvcNrIpZYAqLxIklExhBqoQFwiSm3z7EDGKzCKhKrPi1 GMzmFfCQOLniCtAkDqB9ChJzJtmAhDkFPCXOX37JCmILAZVMnLWfcQIj7wJGhlWMoqkFyQXF Sem5RnrFibnFpXnpesn5uZsYwRHwTHoH46oGi0OMAhyMSjy8KyaYhgqxJpYVV+YeYpTgYFYS 4RUUMgsV4k1JrKxKLcqPLyrNSS0+xCjNwaIkzjtHVy5USCA9sSQ1OzW1ILUIJsvEwSnVwGgd 7barTKRB1ny91J5JJnmqDhrm5yWOzujY4TWtK8nEqOVB3gQn/yl9LIICc01PhKfM/zUxL+Al V4HTNsNtGi1SBT+6Zocvtlg6Z8GL5sUvjSXsp71Qjzrdmbzp8/vuKvGWwE1ndq/JUvmzQOrQ H9XWYtnvh2tf2OaaVRe5F+4qa7z2tIzvghJLcUaioRZzUXEiAJSsOxB8AgAA Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thomas Abraham For Exynos5420 platforms, add CPU operating points and CPU regulator supply properties for migrating from Exynos specific cpufreq driver to using generic cpufreq driver. Changes by Bartlomiej: - split Exynos5420 support from the original patch Cc: Kukjin Kim Cc: Doug Anderson Cc: Javier Martinez Canillas Cc: Andreas Faerber Cc: Sachin Kamat Signed-off-by: Thomas Abraham Signed-off-by: Bartlomiej Zolnierkiewicz Reviewed-by: Lukasz Majewski --- arch/arm/boot/dts/exynos5420.dtsi | 38 +++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index f67b23f..85b9cfc 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -59,8 +59,26 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; + clocks = <&clock CLK_ARM_CLK>; + clock-names = "cpu-cluster.0"; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + clock-latency = <140000>; + + operating-points = < + 1800000 1250000 + 1700000 1212500 + 1600000 1175000 + 1500000 1137500 + 1400000 1112500 + 1300000 1062500 + 1200000 1037500 + 1100000 1012500 + 1000000 987500 + 900000 962500 + 800000 937500 + 700000 912500 + >; }; cpu1: cpu@1 { @@ -69,6 +87,7 @@ reg = <0x1>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + clock-latency = <140000>; }; cpu2: cpu@2 { @@ -77,6 +96,7 @@ reg = <0x2>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + clock-latency = <140000>; }; cpu3: cpu@3 { @@ -85,14 +105,29 @@ reg = <0x3>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + clock-latency = <140000>; }; cpu4: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x100>; + clocks = <&clock CLK_KFC_CLK>; + clock-names = "cpu-cluster.1"; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + clock-latency = <140000>; + + operating-points = < + 1300000 1275000 + 1200000 1212500 + 1100000 1162500 + 1000000 1112500 + 900000 1062500 + 800000 1025000 + 700000 975000 + 600000 937500 + >; }; cpu5: cpu@101 { @@ -101,6 +136,7 @@ reg = <0x101>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + clock-latency = <140000>; }; cpu6: cpu@102 { @@ -109,6 +145,7 @@ reg = <0x102>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + clock-latency = <140000>; }; cpu7: cpu@103 { @@ -117,6 +154,7 @@ reg = <0x103>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + clock-latency = <140000>; }; };