From patchwork Wed Apr 29 08:38:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pankaj Dubey X-Patchwork-Id: 6294081 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D5276BEEE1 for ; Wed, 29 Apr 2015 08:37:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A89A7203B4 for ; Wed, 29 Apr 2015 08:37:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5B55A203A9 for ; Wed, 29 Apr 2015 08:37:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1422728AbbD2IhS (ORCPT ); Wed, 29 Apr 2015 04:37:18 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:10845 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031507AbbD2Ifw (ORCPT ); Wed, 29 Apr 2015 04:35:52 -0400 Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NNK00BYI7VQ3620@mailout3.samsung.com>; Wed, 29 Apr 2015 17:35:50 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id A1.13.20564.6E790455; Wed, 29 Apr 2015 17:35:50 +0900 (KST) X-AuditID: cbfee690-f796f6d000005054-ce-554097e6fed8 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 54.34.03871.6E790455; Wed, 29 Apr 2015 17:35:50 +0900 (KST) Received: from chromebld-server.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NNK00I5G7VI2B91@mmp1.samsung.com>; Wed, 29 Apr 2015 17:35:50 +0900 (KST) From: Pankaj Dubey To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: kgene@kernel.org, heiko@sntech.de, linux@arm.linux.org.uk, thomas.ab@samsung.com, Pankaj Dubey Subject: [PATCH 1/5] drivers: soc: add support for exynos SROM driver Date: Wed, 29 Apr 2015 14:08:28 +0530 Message-id: <1430296712-10287-2-git-send-email-pankaj.dubey@samsung.com> X-Mailer: git-send-email 2.2.0 In-reply-to: <1430296712-10287-1-git-send-email-pankaj.dubey@samsung.com> References: <1430296712-10287-1-git-send-email-pankaj.dubey@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrJLMWRmVeSWpSXmKPExsWyRsSkSvfZdIdQg45n4hbzj5xjtfj/6DWr Rf/j18wWmx5fY7W4vGsOm8WM8/uYLG5f5rVYtPULu0XHMkYHTo+W5h42j02rOtk8Ni+p9+jb sorRY/u1ecwenzfJBbBFcdmkpOZklqUW6dslcGVs+/+eteC6dcWjL3uZGxi3G3YxcnJICJhI TN+5mx3CFpO4cG89WxcjF4eQwFJGiQ1LrjLBFE1snMIKkVjEKDHr5VtmCKeVSeLM5VNg7WwC uhJP3s8FS4gItDNKnD38BqydWaBeYv+et2wgtrCAq8T2jT9ZQGwWAVWJ3f8+M4PYvAIeEj37 f0Otk5PYcusR2FBOAU+J3x0HwHqFgGoWb7nBDrJAQmAdu8S1/6cZIQYJSHybfAhoKAdQQlZi 0wFmiDmSEgdX3GCZwCi8gJFhFaNoakFyQXFSepGJXnFibnFpXrpecn7uJkZgDJz+92zCDsZ7 B6wPMQpwMCrx8HKoOYQKsSaWFVfmHmI0BdowkVlKNDkfGGl5JfGGxmZGFqYmpsZG5pZmSuK8 r6V+BgsJpCeWpGanphakFsUXleakFh9iZOLglGpg7OLQto/25ZmWx33yd+PZq3yS/s/F1k5x UeuevMdPIIGvYUo+c0rbwX+Rk+22r768+WRZEHPX9H4WFYajUisvF2V1X1bpc+WtZnwtapv1 2oK7jDunOnZ26P7Isn8qQar5y683iL/wNth+a59Y1aVb8UWR75d9q68QfeOrPivm76OnR8zk e98qsRRnJBpqMRcVJwIAD/yIeXwCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMIsWRmVeSWpSXmKPExsVy+t9jAd1n0x1CDU6c57WYf+Qcq8X/R69Z Lfofv2a22PT4GqvF5V1z2CxmnN/HZHH7Mq/Foq1f2C06ljE6cHq0NPeweWxa1cnmsXlJvUff llWMHtuvzWP2+LxJLoAtqoHRJiM1MSW1SCE1Lzk/JTMv3VbJOzjeOd7UzMBQ19DSwlxJIS8x N9VWycUnQNctMwfoJiWFssScUqBQQGJxsZK+HaYJoSFuuhYwjRG6viFBcD1GBmggYQ1jxrb/ 71kLrltXPPqyl7mBcbthFyMnh4SAicTEximsELaYxIV769m6GLk4hAQWMUrMevmWGcJpZZI4 c/kUO0gVm4CuxJP3c8ESIgLtjBJnD79hAkkwC9RL7N/zlg3EFhZwldi+8ScLiM0ioCqx+99n ZhCbV8BDomf/byaIdXISW249AhvKKeAp8bvjAFivEFDN4i032Ccw8i5gZFjFKJpakFxQnJSe a6RXnJhbXJqXrpecn7uJERxhz6R3MK5qsDjEKMDBqMTDK6DrECrEmlhWXJl7iFGCg1lJhPdT I1CINyWxsiq1KD++qDQntfgQoynQVROZpUST84HRn1cSb2hsYm5qbGppYmFiZqkkzjtHVy5U SCA9sSQ1OzW1ILUIpo+Jg1OqgbGI70f4jyAn7s4TmzxZHvsdOJVYZe2jpTHF56rc9oi3/zz0 9roLiqUd4JZUsoyQCeDnerfv7mKX3esXTOFl895yaU3PHwevmmmsQluunV9We7TRcWK+8bvO 2KtTVxp4Ve+YeTRh87bvn75x69nyvT9kFLTSw7NkzvRbE1sjFc+ll8amifgnn1FiKc5INNRi LipOBAAA4bcjxgIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds Exynos SROM controller driver which will handle save restore of SROM registers during S2R. Change-Id: Iaddaaebc1d7090c9889e948e68e886519562c43c Signed-off-by: Pankaj Dubey --- drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 1 + drivers/soc/samsung/Kconfig | 14 ++++ drivers/soc/samsung/Makefile | 1 + drivers/soc/samsung/exynos-srom.c | 142 ++++++++++++++++++++++++++++++++++++++ drivers/soc/samsung/exynos-srom.h | 51 ++++++++++++++ 6 files changed, 210 insertions(+) create mode 100644 drivers/soc/samsung/Kconfig create mode 100644 drivers/soc/samsung/Makefile create mode 100644 drivers/soc/samsung/exynos-srom.c create mode 100644 drivers/soc/samsung/exynos-srom.h diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index 76d6bd4..c3abfbe 100644 --- a/drivers/soc/Kconfig +++ b/drivers/soc/Kconfig @@ -1,6 +1,7 @@ menu "SOC (System On Chip) specific Drivers" source "drivers/soc/qcom/Kconfig" +source "drivers/soc/samsung/Kconfig" source "drivers/soc/ti/Kconfig" source "drivers/soc/versatile/Kconfig" diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 063113d..620366f 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -3,6 +3,7 @@ # obj-$(CONFIG_ARCH_QCOM) += qcom/ +obj-$(CONFIG_SOC_SAMSUNG) += samsung/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-$(CONFIG_SOC_TI) += ti/ obj-$(CONFIG_PLAT_VERSATILE) += versatile/ diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig new file mode 100644 index 0000000..b6fa4e6 --- /dev/null +++ b/drivers/soc/samsung/Kconfig @@ -0,0 +1,14 @@ +# +# SAMSUNG SoC drivers +# +menu "Samsung SOC driver support" + +config SOC_SAMSUNG + bool + +config EXYNOS_SROM + bool + depends on ARM && ARCH_EXYNOS + select SOC_BUS + +endmenu diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile new file mode 100644 index 0000000..9c554d5 --- /dev/null +++ b/drivers/soc/samsung/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_EXYNOS_SROM) += exynos-srom.o diff --git a/drivers/soc/samsung/exynos-srom.c b/drivers/soc/samsung/exynos-srom.c new file mode 100644 index 0000000..8aae762 --- /dev/null +++ b/drivers/soc/samsung/exynos-srom.c @@ -0,0 +1,142 @@ +/* + * Copyright (c) 2015 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * EXYNOS - SROM Controller support + * Author: Pankaj Dubey + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include "exynos-srom.h" + +static void __iomem *exynos_srom_base; + +static unsigned long exynos_srom_offsets[] = { + /* SROM side */ + S5P_SROM_BW, + S5P_SROM_BC0, + S5P_SROM_BC1, + S5P_SROM_BC2, + S5P_SROM_BC3, +}; + +/** + * struct exynos_srom_reg_dump: register dump of SROM Controller registers. + * @offset: srom register offset from the controller base address. + * @value: the value to be register at offset. + */ +struct exynos_srom_reg_dump { + u32 offset; + u32 value; +}; + +static struct exynos_srom_reg_dump *exynos_srom_regs; + +static struct exynos_srom_reg_dump *exynos_srom_alloc_reg_dump( + const unsigned long *rdump, + unsigned long nr_rdump) +{ + struct exynos_srom_reg_dump *rd; + unsigned int i; + + rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL); + if (!rd) + return NULL; + + for (i = 0; i < nr_rdump; ++i) + rd[i].offset = rdump[i]; + + return rd; +} + +static void exynos_srom_save(void __iomem *base, + struct exynos_srom_reg_dump *rd, + unsigned int num_regs) +{ + for (; num_regs > 0; --num_regs, ++rd) + rd->value = readl(base + rd->offset); + +} + +static void exynos_srom_restore(void __iomem *base, + const struct exynos_srom_reg_dump *rd, + unsigned int num_regs) +{ + for (; num_regs > 0; --num_regs, ++rd) + writel(rd->value, base + rd->offset); + +} + +static const struct of_device_id of_exynos_srom_ids[] = { + { + .compatible = "samsung,exynos-srom", + }, + {}, +}; + +static int exynos_srom_probe(struct platform_device *pdev) +{ + struct device_node *np; + struct device *dev = &pdev->dev; + + np = dev->of_node; + exynos_srom_base = of_iomap(np, 0); + + if (!exynos_srom_base) + return PTR_ERR(exynos_srom_base); + + exynos_srom_regs = exynos_srom_alloc_reg_dump(exynos_srom_offsets, + sizeof(exynos_srom_offsets)); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int exynos_srom_suspend(struct device *dev) +{ + exynos_srom_save(exynos_srom_base, exynos_srom_regs, + ARRAY_SIZE(exynos_srom_offsets)); + + return 0; +} + +static int exynos_srom_resume(struct device *dev) +{ + exynos_srom_restore(exynos_srom_base, exynos_srom_regs, + ARRAY_SIZE(exynos_srom_offsets)); + + return 0; +} + +static const struct dev_pm_ops exynos_srom_dev_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(exynos_srom_suspend, exynos_srom_resume) +}; + +#define DEV_PM_OPS (&exynos_srom_dev_pm_ops) +#else +#define DEV_PM_OPS NULL +#endif /* CONFIG_PM_SLEEP */ + +static struct platform_driver exynos_srom_driver = { + .probe = exynos_srom_probe, + .driver = { + .name = "exynos-srom", + .of_match_table = of_exynos_srom_ids, + .pm = DEV_PM_OPS, + }, +}; + +static int __init exynos_srom_init(void) +{ + return platform_driver_register(&exynos_srom_driver); +} +device_initcall(exynos_srom_init); diff --git a/drivers/soc/samsung/exynos-srom.h b/drivers/soc/samsung/exynos-srom.h new file mode 100644 index 0000000..e6ee438 --- /dev/null +++ b/drivers/soc/samsung/exynos-srom.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2015 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Exynos SROMC register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __SAMSUNG_REGS_SROM_H +#define __SAMSUNG_REGS_SROM_H __FILE__ + +#define S5P_SROMREG(x) (x) + +#define S5P_SROM_BW S5P_SROMREG(0x0) +#define S5P_SROM_BC0 S5P_SROMREG(0x4) +#define S5P_SROM_BC1 S5P_SROMREG(0x8) +#define S5P_SROM_BC2 S5P_SROMREG(0xc) +#define S5P_SROM_BC3 S5P_SROMREG(0x10) +#define S5P_SROM_BC4 S5P_SROMREG(0x14) +#define S5P_SROM_BC5 S5P_SROMREG(0x18) + +/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */ + +#define S5P_SROM_BW__DATAWIDTH__SHIFT 0 +#define S5P_SROM_BW__ADDRMODE__SHIFT 1 +#define S5P_SROM_BW__WAITENABLE__SHIFT 2 +#define S5P_SROM_BW__BYTEENABLE__SHIFT 3 + +#define S5P_SROM_BW__CS_MASK 0xf + +#define S5P_SROM_BW__NCS0__SHIFT 0 +#define S5P_SROM_BW__NCS1__SHIFT 4 +#define S5P_SROM_BW__NCS2__SHIFT 8 +#define S5P_SROM_BW__NCS3__SHIFT 12 +#define S5P_SROM_BW__NCS4__SHIFT 16 +#define S5P_SROM_BW__NCS5__SHIFT 20 + +/* applies to same to BCS0 - BCS3 */ + +#define S5P_SROM_BCX__PMC__SHIFT 0 +#define S5P_SROM_BCX__TACP__SHIFT 4 +#define S5P_SROM_BCX__TCAH__SHIFT 8 +#define S5P_SROM_BCX__TCOH__SHIFT 12 +#define S5P_SROM_BCX__TACC__SHIFT 16 +#define S5P_SROM_BCX__TCOS__SHIFT 24 +#define S5P_SROM_BCX__TACS__SHIFT 28 + +#endif /* __SAMSUNG_REGS_SROM_H */