From patchwork Thu May 7 17:48:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 6360131 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AE5A5BEEE1 for ; Thu, 7 May 2015 17:49:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D4373200FF for ; Thu, 7 May 2015 17:49:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A50A4203AC for ; Thu, 7 May 2015 17:49:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751086AbbEGRtd (ORCPT ); Thu, 7 May 2015 13:49:33 -0400 Received: from mail-pd0-f178.google.com ([209.85.192.178]:36114 "EHLO mail-pd0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750986AbbEGRtc (ORCPT ); Thu, 7 May 2015 13:49:32 -0400 Received: by pdea3 with SMTP id a3so47433934pde.3; Thu, 07 May 2015 10:49:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=jKmsoNtQMqvTZsj4yoHpgFG+ObBOU5ugfkWik6b+6S8=; b=aQLgwYLD8EorhvF/L6876+EBTREU5ZUMrgj4x9BvhGsxysOdIUYlj9wigdaIIdVjOF F6pgiswbBTZrrpYPO4kM2qNc3IWTvvW5I6119IK/TVMmFCfMooTeksdS3ZZfGoK9cMHf wksS3lkUxZ2gMj0SRJb0koHSqXYCkLtLaXhMtc49/JXvc9tB5iQQnCkB52WAxFogwjaS o6A1vlsgm5w/LApXXCnNs2sbcbh8tUIP066SntzKRMZ6u8U892zdTs1LHebKipc4d3id CensPiS1PrbYckIirADcX4y4a/a/lfJ7AL1N4Ms7GNhgDz0yDZeFRlsTEvTewrM3ZxFW yfUA== X-Received: by 10.70.138.8 with SMTP id qm8mr8895609pdb.96.1431020972067; Thu, 07 May 2015 10:49:32 -0700 (PDT) Received: from localhost.localdomain ([110.227.52.96]) by mx.google.com with ESMTPSA id bs4sm2790794pdb.21.2015.05.07.10.49.26 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 07 May 2015 10:49:31 -0700 (PDT) From: Anand Moon To: Bartlomiej Zolnierkiewicz , Sylwester Nawrocki , Tomasz Figa , Mike Turquette , Stephen Boyd , Kukjin Kim Cc: linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Anand Moon Subject: [PATCH] clk samsung exynos5420 add CLK_RECALC_NEW_RATES flag to mout_apll and mout_kpll clock. Date: Fri, 8 May 2015 03:18:55 +0930 Message-Id: <1431020935-5025-1-git-send-email-linux.amoon@gmail.com> X-Mailer: git-send-email 1.9.1 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Addition of CLK_RECALC_NEW_RATES flag to support Exynos5 cpu clk so that correct divider values are re-calculated after both pre/post clock notifiers had run for for mout_apll clock and mout_kpll clock. Depend on https://lkml.org/lkml/2015/4/3/388 Tested on OdroidXU3 Board. Signed-off-by: Anand Moon Reviewed-by: Krzysztof Kozlowski --- drivers/clk/samsung/clk-exynos5420.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 462aaee..6c7458c 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -618,10 +618,10 @@ static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = { MUX(0, "mout_mspll_cpu", mout_mspll_cpu_p, SRC_TOP7, 12, 2), MUX_F(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, - CLK_SET_RATE_PARENT, 0), + CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0), MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), MUX_F(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1, - CLK_SET_RATE_PARENT, 0), + CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0), MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1), MUX(0, "mout_aclk200", mout_group1_p, SRC_TOP0, 8, 2),