From patchwork Sat May 30 06:37:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 6512371 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DA2659F38D for ; Sat, 30 May 2015 06:38:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 017AE20802 for ; Sat, 30 May 2015 06:38:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2511020520 for ; Sat, 30 May 2015 06:38:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752997AbbE3Ghz (ORCPT ); Sat, 30 May 2015 02:37:55 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:33342 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751718AbbE3Ghy (ORCPT ); Sat, 30 May 2015 02:37:54 -0400 Received: by padj3 with SMTP id j3so7575689pad.0; Fri, 29 May 2015 23:37:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=t7LoIU0A7isJ3sJUaDPS70l6wD05M10UT1WcLxswdYc=; b=A+GbbpwrnhXQ5zc6eWyJEaJNLpiBVusgEcJdAPzPjpaKcipJsqOVxvDvE8xM6wYnIV ib/mY7oVU7GA8LmS8RWjhLnrOz7ga7IE9rRp+w69oBiHXom2a4/wpzZpZJ0cgxFpu+bo q/X8lA9F1jsAm5VwY5uITW/nq7qpcCWovuWEbA+xU/fh4tnVIM0STXalHRCy/y78sSk3 m3rbCpS+ktDKXQoMZVhEiZrwi1A1wiyX7zG+DPJipHgCCGcs9H4h12iFRwu86ffJsI22 u04FJBNSoYQRUGMxL5rqmvNSwJUs7/gJU1/Pn36B4YlcPlCcJl+epGQGF7lviQOawVQt fnbw== X-Received: by 10.70.42.165 with SMTP id p5mr21738676pdl.132.1432967873464; Fri, 29 May 2015 23:37:53 -0700 (PDT) Received: from localhost.localdomain ([125.130.175.98]) by mx.google.com with ESMTPSA id pr5sm7525905pbc.63.2015.05.29.23.37.50 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 29 May 2015 23:37:52 -0700 (PDT) From: Krzysztof Kozlowski To: Kukjin Kim , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Javier Martinez Canillas , Krzysztof Kozlowski Subject: [PATCH v2] ARM: dts: odroidxu3: Enable wake alarm of S2MPS11 RTC Date: Sat, 30 May 2015 15:37:14 +0900 Message-Id: <1432967834-5539-1-git-send-email-k.kozlowski.k@gmail.com> X-Mailer: git-send-email 2.1.4 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The IRQB of S2MPS11 PMIC is wired to XEINT4 (GPX0-4) through pull-up resistor. Add interrupt properties and pinctrl configuration to enable RTC wake alarm of rtc-s5m driver. This also removes a warning: sec_pmic 4-0066: No interrupt specified, no interrupts Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas --- Changes since v1: 1. Choose proper pinctrl node for gpx0-4: this should be pinctrl_0, not pinctrl_1. 2. Add Javier's reviewed-by. --- arch/arm/boot/dts/exynos5422-odroidxu3.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts index c16987950aa1..1df2f38e2fcb 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts @@ -12,6 +12,7 @@ /dts-v1/; #include +#include #include #include #include "exynos5800.dtsi" @@ -153,6 +154,11 @@ s2mps11,buck3-ramp-enable = <1>; s2mps11,buck4-ramp-enable = <1>; + interrupt-parent = <&gpx0>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&s2mps11_irq>; + s2mps11_osc: clocks { #clock-cells = <1>; clock-output-names = "s2mps11_ap", @@ -464,6 +470,13 @@ samsung,pin-pud = <1>; samsung,pin-drv = <0>; }; + + s2mps11_irq: s2mps11-irq { + samsung,pins = "gpx0-4"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; }; &pinctrl_1 {