From patchwork Sun Jun 14 10:24:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 6604281 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 66545C0020 for ; Sun, 14 Jun 2015 10:25:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 65D8D2063B for ; Sun, 14 Jun 2015 10:25:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 61CC4205BA for ; Sun, 14 Jun 2015 10:25:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752024AbbFNKZQ (ORCPT ); Sun, 14 Jun 2015 06:25:16 -0400 Received: from mail-pa0-f47.google.com ([209.85.220.47]:35742 "EHLO mail-pa0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751342AbbFNKZJ (ORCPT ); Sun, 14 Jun 2015 06:25:09 -0400 Received: by pacyx8 with SMTP id yx8so47461689pac.2; Sun, 14 Jun 2015 03:25:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XeRDP4XWS8G+n2TNVaYOIuTg7esEmiNEeGNNw1rA+NM=; b=dKuBnKlAIbI1HzLsV30o8W9PBzoqCnLnBIs3Ti5u8uaadkiN8gN3WJtgN/ymEyufTw 4BweO8CixB4o43AOV1iks6Zc+QWV/1n4kxkcxv77I7ql99/OkN4fhPvH1015mYzOQzfW 291UyTMfXPPSu5+ve+7wh5QoN+h5hA8dcWEjUgaHN8jLdcAh9OMA+NjN1xPoUMIPeq+h ox+6x8wktllv8PSQl8ZdTr9Q0ESJDpU/EhXJ9L8hO0X1rD3ZSWq0kgXaPeNp4A+ZXW5X RDqiYtHjMENthxO5QNg8MGQwbIFI0mkwY6VNh7hr66Vx26oPCQpNjlI5HPA+bEN+y/t+ UWvQ== X-Received: by 10.66.154.111 with SMTP id vn15mr37978795pab.108.1434277508518; Sun, 14 Jun 2015 03:25:08 -0700 (PDT) Received: from localhost.localdomain ([103.249.90.212]) by mx.google.com with ESMTPSA id da2sm8853079pbb.57.2015.06.14.03.25.03 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 14 Jun 2015 03:25:07 -0700 (PDT) From: Anand Moon To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Kukjin Kim , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Anand Moon Subject: [PATCHv6 2/4] ARM: dts: exynos5422-odroidxu3: Enable TMU at Exynos5422 base Date: Sun, 14 Jun 2015 19:54:03 +0930 Message-Id: <1434277445-5243-2-git-send-email-linux.amoon@gmail.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1434277445-5243-1-git-send-email-linux.amoon@gmail.com> References: <1434277445-5243-1-git-send-email-linux.amoon@gmail.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This changes enables TMU IP block on the Exynos5422 Odroid-XU3 device. Signed-off-by: Anand Moon Tested-by: Markus Reichl Acked-by: Lukasz Majewski --- Changes rebase on git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung branch for-next Changes from v5: Use LDO7 regulator instead of LD010. The output of LDO18 goes to VDD_EMMC_1V8. This is not regulator for TMU. I think the schematics are missing some of details but it can be deducted that: 1. TEMP SE is supplied by VDD18_TS power domain. It consists of 5 pairs of pins (XTSTEST_OUT[0-4], XTSEXT_RES[0-4]). 2. The VDD18_TS01, VDD18_TS23 and VDD18_TS4 are wired to the LDO7 of S2MPS11 PMIC. 3. I confirmed with the Exynos5422 datasheet that these VDD18_TS{01,23,4} supply the XTSTEST pins (OUT and RES). So the LDO7 it is... but before using it there is a caveat. The LDO7 is also connected to VDD of MIPI, HDMI and few more. So when you use this regulator in TMU it may be turned off by TMU driver (e.g. during unbind). In such case these other blocks also should be tested and checked whether they take this regulator and enable it. --- arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index a2f9941..b6570fc 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -474,6 +474,31 @@ status = "okay"; }; +&tmu_cpu0 { + vtmu-supply = <&ldo7_reg>; + status = "okay"; +}; + +&tmu_cpu1 { + vtmu-supply = <&ldo7_reg>; + status = "okay"; +}; + +&tmu_cpu2 { + vtmu-supply = <&ldo7_reg>; + status = "okay"; +}; + +&tmu_cpu3 { + vtmu-supply = <&ldo7_reg>; + status = "okay"; +}; + +&tmu_gpu { + vtmu-supply = <&ldo7_reg>; + status = "okay"; +}; + &rtc { status = "okay"; clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;