From patchwork Mon Jun 15 02:53:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 6605781 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id F3D76C0433 for ; Mon, 15 Jun 2015 02:53:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 34A8D20561 for ; Mon, 15 Jun 2015 02:53:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 46781205E5 for ; Mon, 15 Jun 2015 02:53:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753897AbbFOCxp (ORCPT ); Sun, 14 Jun 2015 22:53:45 -0400 Received: from mail-pa0-f50.google.com ([209.85.220.50]:34833 "EHLO mail-pa0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753890AbbFOCxn (ORCPT ); Sun, 14 Jun 2015 22:53:43 -0400 Received: by pacyx8 with SMTP id yx8so56195164pac.2; Sun, 14 Jun 2015 19:53:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bCKeVEQ2fg+nvTY4tk6Ig7OmuK0GU9zsV6nbXyWLXTI=; b=TwYDwwYzR/SlaNq3vRGOKtnAePda5D6iYcbZL0G5WJlyVcucOBDWZUYna9zsG0qfLy OroVjJN/SpaPOhEG9X1TlmEpWwqACGiobgtoexgc5kFktyRRe2sM4aHhaT3aYsgModQy YjIyqIxaSMR3rkJMpiViZKyjvD/tctDaHCTQw5rehG4UxpEbFIeB0VXShIl2yQIhFuIv hNR4piDQRloLi8U4pvhXnSgQV1osmsiNzFkO1sXzcPfVl7ksKX5gwPwWORtapPGdpMCk BQHiFaoa0sufT1DRBOW3skAG67ZRDWpFyZBbnKxE4JMp8WqRy7kq3iy/jM/dQN4cYXfj HZdA== X-Received: by 10.70.118.73 with SMTP id kk9mr44278382pdb.150.1434336823472; Sun, 14 Jun 2015 19:53:43 -0700 (PDT) Received: from localhost.localdomain ([115.117.45.10]) by mx.google.com with ESMTPSA id oa3sm10413211pbb.23.2015.06.14.19.53.37 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 14 Jun 2015 19:53:42 -0700 (PDT) From: Anand Moon To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Kukjin Kim , Krzysztof Kozlowski , Markus Reichl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Anand Moon Subject: [PATCHv7 2/4] ARM: dts: exynos5422-odroidxu3: Enable TMU at Exynos5422 base Date: Mon, 15 Jun 2015 12:23:21 +0930 Message-Id: <1434336803-4132-2-git-send-email-linux.amoon@gmail.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1434336803-4132-1-git-send-email-linux.amoon@gmail.com> References: <1434336803-4132-1-git-send-email-linux.amoon@gmail.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This changes enables TMU IP block on the Exynos5422 Odroid-XU3 device. Signed-off-by: Anand Moon Acked-by: Lukasz Majewski Tested-by: Krzysztof Kozlowski Acked-by: Krzysztof Kozlowski --- Changes rebase on git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung branch for-next Changes from v5 and v6: Use LDO7 regulator instead of LDO10 regulator to control TMU. Fixed the commit log. --- arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 17e6a9a..96d894e 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -474,6 +474,31 @@ status = "okay"; }; +&tmu_cpu0 { + vtmu-supply = <&ldo7_reg>; + status = "okay"; +}; + +&tmu_cpu1 { + vtmu-supply = <&ldo7_reg>; + status = "okay"; +}; + +&tmu_cpu2 { + vtmu-supply = <&ldo7_reg>; + status = "okay"; +}; + +&tmu_cpu3 { + vtmu-supply = <&ldo7_reg>; + status = "okay"; +}; + +&tmu_gpu { + vtmu-supply = <&ldo7_reg>; + status = "okay"; +}; + &rtc { status = "okay"; clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;