From patchwork Wed Jul 15 01:36:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 6790921 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 790FD9F3E6 for ; Wed, 15 Jul 2015 01:37:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7660D2071E for ; Wed, 15 Jul 2015 01:37:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 58D1A20719 for ; Wed, 15 Jul 2015 01:37:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751898AbbGOBhT (ORCPT ); Tue, 14 Jul 2015 21:37:19 -0400 Received: from mail-pa0-f54.google.com ([209.85.220.54]:34456 "EHLO mail-pa0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751799AbbGOBhR (ORCPT ); Tue, 14 Jul 2015 21:37:17 -0400 Received: by pacan13 with SMTP id an13so14610477pac.1 for ; Tue, 14 Jul 2015 18:37:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=CpZaMey9B59PnZ5/+quIgrv+P5Hj752YTajSyKJLuac=; b=jXE/UDcmTlWRXoJWs6ZkWtAfI5WUv5sWB/xORcpv2XBqCwVocdQZjfmC79VKlgUZCI v78bRqnCjHgbtfaBE4EB8LazKb6266XTuyR+doqMUQ9xIunN6afOxQsEl/gAUqQxCRZd pFFuqNzanektmNJH4i2xLFOahVqAy0utvpJNDtjow+pVvt3DEeM2BL7PMudi1pUgGg0L jXz+mkTNNiWSX1oA9mPnDRFMzHsgHo3z68258tJbq5NmL0FfHto9m6XSOMf4dn0tFwVr rpq5Ylu1ClY7kItUlpegJ+1Rv8nIcDg2yX+vAw66C4c9EoO2jQk475a9Z4wsidlRFf6G 41Hw== X-Received: by 10.70.90.42 with SMTP id bt10mr2884980pdb.60.1436924237219; Tue, 14 Jul 2015 18:37:17 -0700 (PDT) Received: from localhost.localdomain ([112.169.4.226]) by smtp.gmail.com with ESMTPSA id db1sm2653378pdb.50.2015.07.14.18.37.08 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Jul 2015 18:37:16 -0700 (PDT) From: Chanho Park To: kgene@kernel.org, k.kozlowski@samsung.com Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, Chanho Park , Joonyoung Shim , Chanwoo Choi , Kevin Hilman , Heesub Shin , Mauro Ribeiro , Abhilash Kesavan , Przemyslaw Marczak , Marek Szyprowski , Chanho Park Subject: [RFC] ARM: EXYNOS: reset KFC cores when cpu is up Date: Wed, 15 Jul 2015 10:36:53 +0900 Message-Id: <1436924213-29732-1-git-send-email-parkch98@gmail.com> X-Mailer: git-send-email 2.1.0 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The cpu booting of exynos5422 has been still broken since we discussed it in last year[1]. I found this resetting codes from odroid-xu3 kernel of hardkernel, it could help to boot 8 cores well. This patch need to have more test like STR and other SoC especially exynos5800 which is variant of exynos5422. If this patch is broken on exynos5800, I'll find another way to check exynos5422. This patch is top of my previous exynos5422 cpu ordering patch[2] and need to enable CONFIG_EXYNOS5420_MCPM=y [ 0.047509] CPU0: update cpu_capacity 448 [ 0.047534] CPU0: thread -1, cpu 0, socket 1, mpidr 80000100 [ 0.047874] Setting up static identity map for 0x400082c0 - 0x40008318 [ 0.048340] ARM CCI driver probed [ 0.048597] Exynos MCPM support installed [ 0.065676] CPU1: update cpu_capacity 448 [ 0.065685] CPU1: thread -1, cpu 1, socket 1, mpidr 80000101 [ 0.070672] CPU2: update cpu_capacity 448 [ 0.070680] CPU2: thread -1, cpu 2, socket 1, mpidr 80000102 [ 0.075644] CPU3: update cpu_capacity 448 [ 0.075653] CPU3: thread -1, cpu 3, socket 1, mpidr 80000103 [ 0.080590] CPU4: update cpu_capacity 1535 [ 0.080600] CPU4: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.085591] CPU5: update cpu_capacity 1535 [ 0.085599] CPU5: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.090590] CPU6: update cpu_capacity 1535 [ 0.090598] CPU6: thread -1, cpu 2, socket 0, mpidr 80000002 [ 0.095585] CPU7: update cpu_capacity 1535 [ 0.095593] CPU7: thread -1, cpu 3, socket 0, mpidr 80000003 [ 0.095720] Brought up 8 CPUs [1]:http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/350632.html [2]:https://patchwork.kernel.org/patch/6782891/ Cc: Joonyoung Shim Cc: Chanwoo Choi Cc: Kevin Hilman Cc: Heesub Shin Cc: Mauro Ribeiro Cc: Abhilash Kesavan Cc: Przemyslaw Marczak Cc: Marek Szyprowski Cc: Krzysztof Kozlowski Signed-off-by: Chanho Park Signed-off-by: Chanho Park Tested-by: Anand Moon --- arch/arm/mach-exynos/mcpm-exynos.c | 13 ++++++++++++- arch/arm/mach-exynos/regs-pmu.h | 6 ++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index 9bdf547..a076dde 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -70,7 +70,18 @@ static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster) cluster >= EXYNOS5420_NR_CLUSTERS) return -EINVAL; - exynos_cpu_power_up(cpunr); + if (!exynos_cpu_power_state(cpunr)) { + exynos_cpu_power_up(cpunr); + + if (soc_is_exynos5800() && cluster) { + while (!pmu_raw_readl(S5P_PMU_SPARE2)) + udelay(10); + + pmu_raw_writel(EXYNOS5420_KFC_CORE_RESET(cpu), + EXYNOS_SWRESET); + } + } + return 0; } diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h index b761433..fba9068 100644 --- a/arch/arm/mach-exynos/regs-pmu.h +++ b/arch/arm/mach-exynos/regs-pmu.h @@ -513,6 +513,12 @@ static inline unsigned int exynos_pmu_cpunr(unsigned int mpidr) #define SPREAD_ENABLE 0xF #define SPREAD_USE_STANDWFI 0xF +#define EXYNOS5420_KFC_CORE_RESET0 BIT(8) +#define EXYNOS5420_KFC_ETM_RESET0 BIT(20) + +#define EXYNOS5420_KFC_CORE_RESET(_nr) \ + ((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr)) + #define EXYNOS5420_BB_CON1 0x0784 #define EXYNOS5420_BB_SEL_EN BIT(31) #define EXYNOS5420_BB_PMOS_EN BIT(7)