From patchwork Fri Sep 4 11:37:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alim Akhtar X-Patchwork-Id: 7121451 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D6F909F380 for ; Fri, 4 Sep 2015 11:49:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 268C02061C for ; Fri, 4 Sep 2015 11:49:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3695B2083C for ; Fri, 4 Sep 2015 11:49:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932492AbbIDLtg (ORCPT ); Fri, 4 Sep 2015 07:49:36 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:35751 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932474AbbIDLtf (ORCPT ); Fri, 4 Sep 2015 07:49:35 -0400 Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NU501236I6LWO40@mailout3.samsung.com>; Fri, 04 Sep 2015 20:49:34 +0900 (KST) Received: from epcpsbgm2new.samsung.com ( [172.20.52.122]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id 89.9B.29324.D4589E55; Fri, 4 Sep 2015 20:49:33 +0900 (KST) X-AuditID: cbfee68d-f79106d00000728c-db-55e9854d152d Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id 63.72.18629.D4589E55; Fri, 4 Sep 2015 20:49:33 +0900 (KST) Received: from exypnos.sisodomain.com ([107.108.73.28]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NU500HFUI0Y1N70@mmp2.samsung.com>; Fri, 04 Sep 2015 20:49:33 +0900 (KST) From: Alim Akhtar To: linux-samsung-soc@vger.kernel.org Cc: s.nawrocki@samsung.com, tomasz.figa@gmail.com, kgene@kernel.org, k.kozlowski@samsung.com, mturquette@baylibre.com, amit.daniel@samsung.com, gautam.vivek@samsung.com, sboyd@codeaurora.org, linux-clk@vger.kernel.org Subject: [PATCH 04/11] clk: samsung: exynos7: Corrects CMU_CCORE clocks names Date: Fri, 04 Sep 2015 17:07:09 +0530 Message-id: <1441366637-28001-5-git-send-email-alim.akhtar@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1441366637-28001-1-git-send-email-alim.akhtar@samsung.com> References: <1441366637-28001-1-git-send-email-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrHLMWRmVeSWpSXmKPExsWyRsSkSte39WWoweYNVhYNV0Ms2q4cZLd4 /cLQov/xa2aLjz33WC1mnN/HZHHxlKvF4TftrBY/znSzWKza9YfRgcvj/Y1Wdo/Lfb1MHjtn 3WX32LSqk82jb8sqRo/Pm+QC2KK4bFJSczLLUov07RK4Mtbem8lY0C5UMeFgA3MD40T+LkZO DgkBE4kJ63+xQdhiEhfurQeyuTiEBFYwSuxZcIQdpmjKhNXsEIlZjBK3911hhXB+Mkp8bTzN ClLFJqAtcXf6FiYQW0RAVeJz2wKwDmaBu4wSt75uBUsIC/hKvLp5B6yBBajo05s+sN28Au4S 29+/hLpDUaL72QQwm1PAQ6Lr8nEWEFsIqObnjSaw+yQEtrFL3Jz+jx1ikIDEt8mHgIo4gBKy EpsOMEPMkZQ4uOIGywRG4QWMDKsYRVMLkguKk9KLDPWKE3OLS/PS9ZLzczcxAqPh9L9nvTsY bx+wPsQowMGoxMN74seLUCHWxLLiytxDjKZAGyYyS4km5wNjLq8k3tDYzMjC1MTU2Mjc0kxJ nFdR6mewkEB6YklqdmpqQWpRfFFpTmrxIUYmDk6pBsZTs16dqL32q5TlWsm/bw+NFJ68vp1n GvTwjralmnJAkeLvwtL9/pXPs1fNfdfrIPu2QLL4Y0izqMZ3PquFBrOmBAhYslcVL9Xc1yEe 7un9NEaLt4V/2mfXa05OXvHL2Nq6sxSEHX/t9csN8Dt8T0Hm4qF9zB9f714w5+/Zy1o3HO/E p/pfc1diKc5INNRiLipOBAALqMnQgQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNIsWRmVeSWpSXmKPExsVy+t9jQV3f1pehBnM79S0aroZYtF05yG7x +oWhRf/j18wWH3vusVrMOL+PyeLiKVeLw2/aWS1+nOlmsVi16w+jA5fH+xut7B6X+3qZPHbO usvusWlVJ5tH35ZVjB6fN8kFsEU1MNpkpCampBYppOYl56dk5qXbKnkHxzvHm5oZGOoaWlqY KynkJeam2iq5+AToumXmAB2mpFCWmFMKFApILC5W0rfDNCE0xE3XAqYxQtc3JAiux8gADSSs YcxYe28mY0G7UMWEgw3MDYwT+bsYOTkkBEwkpkxYzQ5hi0lcuLeerYuRi0NIYBajxO19V1gh nJ+MEl8bT7OCVLEJaEvcnb6FCcQWEVCV+Ny2gB2kiFngLqPEra9bwRLCAr4Sr27eAWtgASr6 9KaPDcTmFXCX2P7+JRvEOkWJ7mcTwGxOAQ+JrsvHWUBsIaCanzea2CYw8i5gZFjFKJFakFxQ nJSea5SXWq5XnJhbXJqXrpecn7uJERxxz6R3MB7e5X6IUYCDUYmH98SPF6FCrIllxZW5hxgl OJiVRHinBr4MFeJNSaysSi3Kjy8qzUktPsRoCnTYRGYp0eR8YDLIK4k3NDYxNzU2tTSxMDGz VBLnlV35LFRIID2xJDU7NbUgtQimj4mDU6qBsaRMdHNcSZa2E/ubNxMqZkgIfdixz6NiydSV Jdc9/iRo2rny7usK3s2wKfXr4bV9ebOt7Z4f+3BrwqvVEtLLrZ685Kld8fev1MkLb/SjJNWa PjVy8v5dGSH2TP7RpUOmPy4ddLPSWar+U0KC5cJfV+czHOz/tfvv6oTt6V7HU/3UrdglfhvH ByWW4oxEQy3mouJEAJvVJYnOAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch rename CMU_CCROE clocks names to match with user manual. And also adds missing gate clock for aclk_ccore_133. Signed-off-by: Alim Akhtar --- drivers/clk/samsung/clk-exynos7.c | 8 ++++++-- include/dt-bindings/clock/exynos7-clk.h | 3 ++- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c index ba84e9b..0eb0f57 100644 --- a/drivers/clk/samsung/clk-exynos7.c +++ b/drivers/clk/samsung/clk-exynos7.c @@ -31,6 +31,7 @@ #define MUX_SEL_TOPC1 0x0204 #define MUX_SEL_TOPC2 0x0208 #define MUX_SEL_TOPC3 0x020C +#define MUX_ENABLE_TOPC2 0x0308 #define DIV_TOPC0 0x0600 #define DIV_TOPC1 0x0604 #define DIV_TOPC3 0x060C @@ -167,6 +168,9 @@ static struct samsung_gate_clock topc_gate_clks[] __initdata = { ENABLE_SCLK_TOPC1, 1, 0, 0), GATE(SCLK_CC_PLL_A, "sclk_cc_pll_a", "dout_sclk_cc_pll", ENABLE_SCLK_TOPC1, 0, 0, 0), + + GATE(ACLK_CCORE_133, "aclk_ccore_133", "dout_aclk_ccore_133", + MUX_ENABLE_TOPC2, 4, 0, 0), }; static struct samsung_pll_clock topc_pll_clks[] __initdata = { @@ -544,7 +548,7 @@ CLK_OF_DECLARE(exynos7_clk_top1, "samsung,exynos7-clock-top1", /* * List of parent clocks for Muxes in CMU_CCORE */ -PNAME(mout_aclk_ccore_133_p) = { "fin_pll", "dout_aclk_ccore_133" }; +PNAME(mout_aclk_ccore_133_user_p) = { "fin_pll", "aclk_ccore_133" }; static unsigned long ccore_clk_regs[] __initdata = { MUX_SEL_CCORE, @@ -552,7 +556,7 @@ static unsigned long ccore_clk_regs[] __initdata = { }; static struct samsung_mux_clock ccore_mux_clks[] __initdata = { - MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_p, + MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_user_p, MUX_SEL_CCORE, 1, 1), }; diff --git a/include/dt-bindings/clock/exynos7-clk.h b/include/dt-bindings/clock/exynos7-clk.h index b63eba6..2e01235 100644 --- a/include/dt-bindings/clock/exynos7-clk.h +++ b/include/dt-bindings/clock/exynos7-clk.h @@ -30,7 +30,8 @@ #define SCLK_BUS0_PLL_A 17 #define SCLK_CC_PLL_B 18 #define SCLK_CC_PLL_A 19 -#define TOPC_NR_CLK 20 +#define ACLK_CCORE_133 20 +#define TOPC_NR_CLK 21 /* TOP0 */ #define DOUT_ACLK_PERIC1 1