From patchwork Fri Sep 4 11:37:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alim Akhtar X-Patchwork-Id: 7121461 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9CC73BEEC1 for ; Fri, 4 Sep 2015 11:50:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 33E3C2083E for ; Fri, 4 Sep 2015 11:50:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3B9E12061C for ; Fri, 4 Sep 2015 11:50:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932497AbbIDLuK (ORCPT ); Fri, 4 Sep 2015 07:50:10 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:47938 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752963AbbIDLuI (ORCPT ); Fri, 4 Sep 2015 07:50:08 -0400 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NU502KRBI7JI650@mailout4.samsung.com>; Fri, 04 Sep 2015 20:50:07 +0900 (KST) Received: from epcpsbgm2new.samsung.com ( [172.20.52.122]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 98.C2.17770.F6589E55; Fri, 4 Sep 2015 20:50:07 +0900 (KST) X-AuditID: cbfee691-f79ca6d00000456a-ba-55e9856f02a2 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id C2.82.18629.F6589E55; Fri, 4 Sep 2015 20:50:07 +0900 (KST) Received: from exypnos.sisodomain.com ([107.108.73.28]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NU500HFUI0Y1N70@mmp2.samsung.com>; Fri, 04 Sep 2015 20:50:07 +0900 (KST) From: Alim Akhtar To: linux-samsung-soc@vger.kernel.org Cc: s.nawrocki@samsung.com, tomasz.figa@gmail.com, kgene@kernel.org, k.kozlowski@samsung.com, mturquette@baylibre.com, amit.daniel@samsung.com, gautam.vivek@samsung.com, sboyd@codeaurora.org, linux-clk@vger.kernel.org Subject: [PATCH 05/11] clk: samsung: exynos7: Corrects CMU_PERIC0 clocks names Date: Fri, 04 Sep 2015 17:07:10 +0530 Message-id: <1441366637-28001-6-git-send-email-alim.akhtar@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1441366637-28001-1-git-send-email-alim.akhtar@samsung.com> References: <1441366637-28001-1-git-send-email-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrNLMWRmVeSWpSXmKPExsWyRsSkSje/9WWowdNOcYuGqyEWbVcOslu8 fmFo0f/4NbPFx557rBYzzu9jsrh4ytXi8Jt2VosfZ7pZLFbt+sPowOXx/kYru8flvl4mj52z 7rJ7bFrVyebRt2UVo8fnTXIBbFFcNimpOZllqUX6dglcGS9/ihZ8E6142byStYHxrlAXIyeH hICJxKH129ggbDGJC/fWA9lcHEICKxgl2vt+sXQxcoAVTZ8kAxGfxSjRthyiQUjgJ6PE4X5L EJtNQFvi7vQtTCC2iICqxOe2BewgDcwCdxklbn3dCpYQFvCT2PH2FpjNAlT08M4BFhCbV8Bd Yv+adkaIKxQlup9NAFvAKeAh0XX5OAvEMneJnzeawK6TENjFLvHjSiczxCABiW+TD0FdKiux 6QAzxBxJiYMrbrBMYBRewMiwilE0tSC5oDgpvchUrzgxt7g0L10vOT93EyMwDk7/ezZxB+P9 A9aHGAU4GJV4eCW+vAgVYk0sK67MPcRoCrRhIrOUaHI+MNrySuINjc2MLExNTI2NzC3NlMR5 daR/BgsJpCeWpGanphakFsUXleakFh9iZOLglGpgjHNeItBo5DbN6GVCn9rPRyI3Pt0PuDRT 3fwxg0raykeuZ3wVVFdmGIioLyqfaXmJR3rBvNXv3i38qnQxyGGxc37WhLAHBk2HHO7LK7/j aXgc8yqZjdt1W/rjWhe3+RNlX3xrMbbhYnNnz2bwsIp5sGx7s9jkGiMv+5vJSmWRpT+My19E zJ+mxFKckWioxVxUnAgAlpp7oX4CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrBIsWRmVeSWpSXmKPExsVy+t9jQd381pehBt+OcFs0XA2xaLtykN3i 9QtDi/7Hr5ktPvbcY7WYcX4fk8XFU64Wh9+0s1r8ONPNYrFq1x9GBy6P9zda2T0u9/Uyeeyc dZfdY9OqTjaPvi2rGD0+b5ILYItqYLTJSE1MSS1SSM1Lzk/JzEu3VfIOjneONzUzMNQ1tLQw V1LIS8xNtVVy8QnQdcvMATpMSaEsMacUKBSQWFyspG+HaUJoiJuuBUxjhK5vSBBcj5EBGkhY w5jx8qdowTfRipfNK1kbGO8KdTFycEgImEhMnyTTxcgJZIpJXLi3nq2LkYtDSGAWo0Tb8m1s IAkhgZ+MEof7LUFsNgFtibvTtzCB2CICqhKf2xawgzQwC9xllLj1dStYQljAT2LH21tgNgtQ 0cM7B1hAbF4Bd4n9a9oZIbYpSnQ/mwC2gFPAQ6Lr8nEWiGXuEj9vNLFNYORdwMiwilEitSC5 oDgpPdcoL7Vcrzgxt7g0L10vOT93EyM41p5J72A8vMv9EKMAB6MSD++JHy9ChVgTy4orcw8x SnAwK4nwTg18GSrEm5JYWZValB9fVJqTWnyI0RTosInMUqLJ+cA0kFcSb2hsYm5qbGppYmFi Zqkkziu78lmokEB6YklqdmpqQWoRTB8TB6dUA2OEuWSOhnxPXcuePQnz89ZVPFr1lKtxwsGj OyauPHYk/MuRc6vltMPX/HnynPVcsILby4NVJ2YfE+Jbtj7yp9+qvF+hk9Tl+IJzVh/JqzdP 3X/t9TzNF1H1rF/CS+0eLXZ3PDv5OXPXhkl3OKIqM5VeXTDVa+t1fOrL6ccyj5epeGpMedq5 potKLMUZiYZazEXFiQCFWLqVywIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch rename CMU_PERIC0 clocks names to match with user manual. And also adds missing gate clock for aclk_peric0_66. Signed-off-by: Alim Akhtar Reviewed-by: Krzysztof Kozlowski --- drivers/clk/samsung/clk-exynos7.c | 12 ++++++++---- include/dt-bindings/clock/exynos7-clk.h | 3 ++- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c index 0eb0f57..782943b 100644 --- a/drivers/clk/samsung/clk-exynos7.c +++ b/drivers/clk/samsung/clk-exynos7.c @@ -223,6 +223,7 @@ CLK_OF_DECLARE(exynos7_clk_topc, "samsung,exynos7-clock-topc", #define DIV_TOP0_PERIC1 0x0634 #define DIV_TOP0_PERIC2 0x0638 #define DIV_TOP0_PERIC3 0x063C +#define ENABLE_ACLK_TOP03 0x080C #define ENABLE_SCLK_TOP0_PERIC0 0x0A30 #define ENABLE_SCLK_TOP0_PERIC1 0x0A34 #define ENABLE_SCLK_TOP0_PERIC2 0x0A38 @@ -337,6 +338,9 @@ static struct samsung_div_clock top0_div_clks[] __initdata = { }; static struct samsung_gate_clock top0_gate_clks[] __initdata = { + GATE(CLK_ACLK_PERIC0_66, "aclk_peric0_66", "dout_aclk_peric0_66", + ENABLE_ACLK_TOP03, 20, CLK_SET_RATE_PARENT, 0), + GATE(CLK_SCLK_SPDIF, "sclk_spdif", "dout_sclk_spdif", ENABLE_SCLK_TOP0_PERIC0, 4, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_PCM1, "sclk_pcm1", "dout_sclk_pcm1", @@ -589,8 +593,8 @@ CLK_OF_DECLARE(exynos7_clk_ccore, "samsung,exynos7-clock-ccore", #define ENABLE_SCLK_PERIC0 0x0A00 /* List of parent clocks for Muxes in CMU_PERIC0 */ -PNAME(mout_aclk_peric0_66_p) = { "fin_pll", "dout_aclk_peric0_66" }; -PNAME(mout_sclk_uart0_p) = { "fin_pll", "sclk_uart0" }; +PNAME(mout_aclk_peric0_66_user_p) = { "fin_pll", "aclk_peric0_66" }; +PNAME(mout_sclk_uart0_user_p) = { "fin_pll", "sclk_uart0" }; static unsigned long peric0_clk_regs[] __initdata = { MUX_SEL_PERIC0, @@ -599,9 +603,9 @@ static unsigned long peric0_clk_regs[] __initdata = { }; static struct samsung_mux_clock peric0_mux_clks[] __initdata = { - MUX(0, "mout_aclk_peric0_66_user", mout_aclk_peric0_66_p, + MUX(0, "mout_aclk_peric0_66_user", mout_aclk_peric0_66_user_p, MUX_SEL_PERIC0, 0, 1), - MUX(0, "mout_sclk_uart0_user", mout_sclk_uart0_p, + MUX(0, "mout_sclk_uart0_user", mout_sclk_uart0_user_p, MUX_SEL_PERIC0, 16, 1), }; diff --git a/include/dt-bindings/clock/exynos7-clk.h b/include/dt-bindings/clock/exynos7-clk.h index 2e01235..ba60a20 100644 --- a/include/dt-bindings/clock/exynos7-clk.h +++ b/include/dt-bindings/clock/exynos7-clk.h @@ -48,7 +48,8 @@ #define CLK_SCLK_SPDIF 12 #define CLK_SCLK_PCM1 13 #define CLK_SCLK_I2S1 14 -#define TOP0_NR_CLK 15 +#define CLK_ACLK_PERIC0_66 15 +#define TOP0_NR_CLK 16 /* TOP1 */ #define DOUT_ACLK_FSYS1_200 1