diff mbox

[v2,2/2] ARM: dts: exynos5250: Add clocks to DISP1 domain

Message ID 1444905084-22540-3-git-send-email-tomeu.vizoso@collabora.com (mailing list archive)
State New, archived
Headers show

Commit Message

Tomeu Vizoso Oct. 15, 2015, 10:31 a.m. UTC
Adds to the node of the DISP1 power domain the two clocks that need to
be reparented while the domain is powered off:
CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB.

Otherwise the state is unknown at power up and the mixer's clocks are
all messed up.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Link: http://lkml.kernel.org/g/561CDC33.7050103@collabora.com
---


 arch/arm/boot/dts/exynos5250.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Krzysztof Kozlowski Oct. 15, 2015, 11:44 p.m. UTC | #1
On 15.10.2015 19:31, Tomeu Vizoso wrote:
> Adds to the node of the DISP1 power domain the two clocks that need to
> be reparented while the domain is powered off:
> CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB.
> 
> Otherwise the state is unknown at power up and the mixer's clocks are
> all messed up.
> 
> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> Link: http://lkml.kernel.org/g/561CDC33.7050103@collabora.com
> ---
> 
> 
>  arch/arm/boot/dts/exynos5250.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index b24610ea8c2a..88b9cf5f226f 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -130,6 +130,10 @@
>  		compatible = "samsung,exynos4210-pd";
>  		reg = <0x100440A0 0x20>;
>  		#power-domain-cells = <0>;
> +		clocks = <&clock CLK_FIN_PLL>,
> +			 <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
> +			 <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
> +		clock-names = "oscclk", "clk0", "clk1";
>  	};
>  
>  	clock: clock-controller@10010000 {
> 

I reviewed it already. Any changes here since v1?

Best regards,
Krzysztof

--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Tomeu Vizoso Oct. 16, 2015, 8:19 a.m. UTC | #2
On 10/16/2015 01:44 AM, Krzysztof Kozlowski wrote:
> On 15.10.2015 19:31, Tomeu Vizoso wrote:
>> Adds to the node of the DISP1 power domain the two clocks that need to
>> be reparented while the domain is powered off:
>> CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB.
>>
>> Otherwise the state is unknown at power up and the mixer's clocks are
>> all messed up.
>>
>> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
>> Link: http://lkml.kernel.org/g/561CDC33.7050103@collabora.com
>> ---
>>
>>
>>  arch/arm/boot/dts/exynos5250.dtsi | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
>> index b24610ea8c2a..88b9cf5f226f 100644
>> --- a/arch/arm/boot/dts/exynos5250.dtsi
>> +++ b/arch/arm/boot/dts/exynos5250.dtsi
>> @@ -130,6 +130,10 @@
>>  		compatible = "samsung,exynos4210-pd";
>>  		reg = <0x100440A0 0x20>;
>>  		#power-domain-cells = <0>;
>> +		clocks = <&clock CLK_FIN_PLL>,
>> +			 <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
>> +			 <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
>> +		clock-names = "oscclk", "clk0", "clk1";
>>  	};
>>  
>>  	clock: clock-controller@10010000 {
>>
> 
> I reviewed it already. Any changes here since v1?

No, I just forgot to add your r-b tag, sorry about that.

Thanks,

Tomeu

--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff mbox

Patch

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b24610ea8c2a..88b9cf5f226f 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -130,6 +130,10 @@ 
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x100440A0 0x20>;
 		#power-domain-cells = <0>;
+		clocks = <&clock CLK_FIN_PLL>,
+			 <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
+			 <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
+		clock-names = "oscclk", "clk0", "clk1";
 	};
 
 	clock: clock-controller@10010000 {