From patchwork Mon Oct 26 12:51:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alim Akhtar X-Patchwork-Id: 7488221 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 16021BEEA4 for ; Mon, 26 Oct 2015 13:04:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 55FFC20774 for ; Mon, 26 Oct 2015 13:04:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BCAD720762 for ; Mon, 26 Oct 2015 13:04:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753988AbbJZNEb (ORCPT ); Mon, 26 Oct 2015 09:04:31 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:47519 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753769AbbJZNEa (ORCPT ); Mon, 26 Oct 2015 09:04:30 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NWT01CUUWBGJO20@mailout4.samsung.com>; Mon, 26 Oct 2015 22:04:28 +0900 (KST) Received: from epcpsbgm1new.samsung.com ( [172.20.52.122]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 37.C2.05284.CD42E265; Mon, 26 Oct 2015 22:04:28 +0900 (KST) X-AuditID: cbfee68f-f796f6d0000014a4-6e-562e24dc62d9 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id 28.FB.23663.CD42E265; Mon, 26 Oct 2015 22:04:28 +0900 (KST) Received: from exypnos.sisodomain.com ([107.108.73.28]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NWT003CQW4DNE20@mmp2.samsung.com>; Mon, 26 Oct 2015 22:04:27 +0900 (KST) From: Alim Akhtar To: lee.jones@linaro.org, broonie@kernel.org Cc: k.kozlowski@samsung.com, mturquette@baylibre.com, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, rtc-linux@googlegroups.com, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/5] clk: s2mps15: Add support for S2MPS15 clocks Date: Mon, 26 Oct 2015 18:21:21 +0530 Message-id: <1445863883-5187-5-git-send-email-alim.akhtar@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1445863883-5187-1-git-send-email-alim.akhtar@samsung.com> References: <1445863883-5187-1-git-send-email-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMLMWRmVeSWpSXmKPExsWyRsSkSveOil6Ywbe/8hZTHz5hs3j9wtDi /tejjBYfe+6xWlzeNYfNYsb5fUwWF0+5Wuzv7GB04PB4f6OV3WPPxJNsHptWdbJ53Lm2h82j b8sqRo/Pm+QC2KK4bFJSczLLUov07RK4MtYfms9ScFW04v/Js6wNjJ8Fuxg5OSQETCS23r3H CGGLSVy4t54NxBYSWMEo8bONCabm9+q1QHEuoPgsRom23xtYIJyfjBLzXrWAdbMJaEvcnb4F qIODQ0RAR+L6jXSQGmaBDYwSK/7eYQepERZwkWhv3csKYrMIqEr83/mbBcTmFXCTWNC8mh1i m6JE97MJYFdwCrhLfHtyFOoiN4k/mw6CXSEhsI5d4sTE44wQgwQkvk0+xAKyWEJAVmLTAWaI OZISB1fcYJnAKLyAkWEVo2hqQXJBcVJ6kbFecWJucWleul5yfu4mRmDYn/73rH8H490D1ocY BTgYlXh4X/DohgmxJpYVV+YeYjQF2jCRWUo0OR8YXXkl8YbGZkYWpiamxkbmlmZK4rwLpX4G CwmkJ5akZqemFqQWxReV5qQWH2Jk4uCUamB0miY2cx7DtMRtxj/5M9szirujt+z8/Utr8pq3 3n8SPjw5M1k1wOrqbdXM3r/zXHpWrpvm/GXWIuUf9zSvHolexFG0/N78ulQPkVoLPe6jUmHH 5bdn/TjD99xbxvjCqqt+j46XllqtP3toXeSLhQzGDy5LBqSd6udav/KO8ZELCjUVR2ccvLe3 RImlOCPRUIu5qDgRAMs2UVV2AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrIIsWRmVeSWpSXmKPExsVy+t9jQd07KnphBo8WiVhMffiEzeL1C0OL +1+PMlp87LnHanF51xw2ixnn9zFZXDzlarG/s4PRgcPj/Y1Wdo89E0+yeWxa1cnmcefaHjaP vi2rGD0+b5ILYItqYLTJSE1MSS1SSM1Lzk/JzEu3VfIOjneONzUzMNQ1tLQwV1LIS8xNtVVy 8QnQdcvMAbpHSaEsMacUKBSQWFyspG+HaUJoiJuuBUxjhK5vSBBcj5EBGkhYw5ix/tB8loKr ohX/T55lbWD8LNjFyMkhIWAi8Xv1WjYIW0ziwr31QDYXh5DALEaJtt8bWCCcn4wS8161MIJU sQloS9ydvoWpi5GDQ0RAR+L6jXSQGmaBDYwSK/7eYQepERZwkWhv3csKYrMIqEr83/mbBcTm FXCTWNC8mh1im6JE97MJYJs5Bdwlvj05CmYLAdX82XSQbQIj7wJGhlWMEqkFyQXFSem5hnmp 5XrFibnFpXnpesn5uZsYwdH1TGoH48Fd7ocYBTgYlXh4X/DohgmxJpYVV+YeYpTgYFYS4f2q oBcmxJuSWFmVWpQfX1Sak1p8iNEU6LCJzFKiyfnAyM8riTc0NjE3NTa1NLEwMbNUEue9kKER JiSQnliSmp2aWpBaBNPHxMEp1cBYfGHmpfbNVVm8OT1Zsseb7kxoWTj5R8nZ+dINbX6LrtSt fbjBU3rRwbsBz/T2/vxa5sG0IGYm/+bNS6KmLFZk73jTc8gkZM/pf7b+bqFuenMjXq3irHhp 9Lh7X+FfU5nJn6zVCjfuei97xncuA0fZdffJvxfr3NqqZ2r64VtNUDDLKfGTLwOslFiKMxIN tZiLihMBXZhwa8QCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP S2MPS15 PMIC has three 32k buffered clocks outputs. This patch adds supports for the same to the s2mps11 clock driver. Signed-off-by: Alim Akhtar --- drivers/clk/Kconfig | 5 +++-- drivers/clk/clk-s2mps11.c | 24 ++++++++++++++++++++++++ 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index a1fa61159179..037a314b5d76 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -120,9 +120,10 @@ config COMMON_CLK_S2MPS11 tristate "Clock driver for S2MPS1X/S5M8767 MFD" depends on MFD_SEC_CORE ---help--- - This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator + This driver supports S2MPS1X/S5M8767 crystal oscillator clock. These multi-function devices have two (S2MPS14) or three - (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. + (S2MPS11/S2MPS13/S2MPS15/S5M8767) fixed-rate oscillators, + clocked at 32KHz each. config CLK_TWL6040 tristate "External McPDM functional clock from twl6040" diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c index d266299dfdb1..455500dca653 100644 --- a/drivers/clk/clk-s2mps11.c +++ b/drivers/clk/clk-s2mps11.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -148,6 +149,24 @@ static struct clk_init_data s2mps14_clks_init[S2MPS11_CLKS_NUM] = { }, }; +static struct clk_init_data s2mps15_clks_init[S2MPS11_CLKS_NUM] = { + [S2MPS11_CLK_AP] = { + .name = "s2mps15_ap", + .ops = &s2mps11_clk_ops, + .flags = CLK_IS_ROOT, + }, + [S2MPS11_CLK_CP] = { + .name = "s2mps15_cp", + .ops = &s2mps11_clk_ops, + .flags = CLK_IS_ROOT, + }, + [S2MPS11_CLK_BT] = { + .name = "s2mps15_bt", + .ops = &s2mps11_clk_ops, + .flags = CLK_IS_ROOT, + }, +}; + static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev, struct clk_init_data *clks_init) { @@ -207,6 +226,10 @@ static int s2mps11_clk_probe(struct platform_device *pdev) s2mps11_reg = S2MPS14_REG_RTCCTRL; clks_init = s2mps14_clks_init; break; + case S2MPS15X: + s2mps11_reg = S2MPS15_REG_RTC_BUF; + clks_init = s2mps15_clks_init; + break; case S5M8767X: s2mps11_reg = S5M8767_REG_CTRL1; clks_init = s2mps11_clks_init; @@ -292,6 +315,7 @@ static const struct platform_device_id s2mps11_clk_id[] = { { "s2mps11-clk", S2MPS11X}, { "s2mps13-clk", S2MPS13X}, { "s2mps14-clk", S2MPS14X}, + { "s2mps15-clk", S2MPS15X}, { "s5m8767-clk", S5M8767X}, { }, };