From patchwork Tue Nov 10 13:23:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 7590941 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CE1A49F443 for ; Tue, 10 Nov 2015 13:25:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 007322070D for ; Tue, 10 Nov 2015 13:25:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B9392207AA for ; Tue, 10 Nov 2015 13:25:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753127AbbKJNY7 (ORCPT ); Tue, 10 Nov 2015 08:24:59 -0500 Received: from mailout4.w1.samsung.com ([210.118.77.14]:11119 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753113AbbKJNY5 (ORCPT ); Tue, 10 Nov 2015 08:24:57 -0500 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NXL00JHEP9JIWA0@mailout4.w1.samsung.com> for linux-samsung-soc@vger.kernel.org; Tue, 10 Nov 2015 13:24:55 +0000 (GMT) X-AuditID: cbfec7f5-f794b6d000001495-3c-5641f026c541 Received: from eusync1.samsung.com ( [203.254.199.211]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 75.B8.05269.620F1465; Tue, 10 Nov 2015 13:24:54 +0000 (GMT) Received: from amdc1339.digital.local ([106.116.147.30]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NXL00L9RP94NP10@eusync1.samsung.com>; Tue, 10 Nov 2015 13:24:54 +0000 (GMT) From: Marek Szyprowski To: dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Inki Dae , Joonyoung Shim , Seung-Woo Kim , Andrzej Hajda , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Tobias Jakobi , Gustavo Padovan , Javier Martinez Canillas Subject: [PATCH 15/25] drm/exynos: add generic check for plane state Date: Tue, 10 Nov 2015 14:23:31 +0100 Message-id: <1447161821-1877-16-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1447161821-1877-1-git-send-email-m.szyprowski@samsung.com> References: <1447161821-1877-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrFLMWRmVeSWpSXmKPExsVy+t/xy7pqHxzDDH580be4te4cq8XGGetZ La58fc9msfPBLnaLSfcnsFi8ebuGyeLFvYssFq9fGFrMOL+PyWLtkbvsFjMmv2SzaFv9gdVi 1a4/jA68Hjtn3WX3uN99nMnj3zF2jy39QN7OSXuZPPq2rGL0+LxJLoA9issmJTUnsyy1SN8u gSvj2eHV7AUd4hXP9p1lbWBcKdzFyMkhIWAi0TNhIzOELSZx4d56ti5GLg4hgaWMErMWN7JA OE1MEu9mT2cCqWITMJToetvFBmKLCLhJNB2eyQpiMwscZpY4PLUOxBYWcJH48/cD2FQWAVWJ q5+esYPYvAIeEp8/drBCbJOT+P9yBdhMTqD41o+fweqFBNwlbjZdZJnAyLuAkWEVo2hqaXJB cVJ6rpFecWJucWleul5yfu4mRkiIft3BuPSY1SFGAQ5GJR7eCd8cwoRYE8uKK3MPMUpwMCuJ 8DK+dgwT4k1JrKxKLcqPLyrNSS0+xCjNwaIkzjtz1/sQIYH0xJLU7NTUgtQimCwTB6dUA6OC srBYdJ5++Hwu86xp/0Rajaaz7/1SOt+0rTCnb4X24y5bqQ0na+dtKWRoLHv4eeISxZQLQjLx k1w3LPleuOutjaTAPY4pedsfrKq9wiVl93KbXeahh9Y8rPtaTCXWPrXIiTLZXOPr7ab4iYtv 83aFSW5PZ5/Q+ZBeNjthifvVJ5ePbHyxoUiJpTgj0VCLuag4EQDeS5+OTQIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds generic check for plane state: pixel format and display area dimensions, so drivers can always assume that they get valid plane state to set. Signed-off-by: Marek Szyprowski Reviewed-by: Gustavo Padovan --- drivers/gpu/drm/exynos/exynos_drm_drv.h | 2 ++ drivers/gpu/drm/exynos/exynos_drm_plane.c | 51 +++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index 9624855128a1..bee0696ccddc 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h @@ -24,6 +24,8 @@ #define DEFAULT_WIN 0 +#define EXYNOS_BAD_PIXEL_FORMAT 0xffffffffu + #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc, base) #define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base) diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index b620d7a76799..e5af4cd5e287 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c @@ -173,6 +173,52 @@ static struct drm_plane_funcs exynos_plane_funcs = { .atomic_destroy_state = exynos_drm_plane_destroy_state, }; +static int +exynos_drm_plane_check_format(const struct exynos_drm_plane_config *config, + struct exynos_drm_plane_state *state) +{ + uint32_t format = EXYNOS_BAD_PIXEL_FORMAT; + int i; + + for (i = 0; i < config->num_pixel_formats; i++) + if (config->pixel_formats[i] == state->base.fb->pixel_format) + format = state->base.fb->pixel_format; + + if (format == EXYNOS_BAD_PIXEL_FORMAT) { + DRM_DEBUG_KMS("unsupported pixel format"); + return -ENOTSUPP; + } + + return 0; +} + +static int +exynos_drm_plane_check_size(const struct exynos_drm_plane_config *config, + struct exynos_drm_plane_state *state) +{ + bool width_ok = false, height_ok = false; + + if (state->src.w == state->crtc.w) + width_ok = true; + + if (state->src.h == state->crtc.h) + height_ok = true; + + if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE_X) && + state->h_ratio == (1 << 15)) + width_ok = true; + + if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE_Y) && + state->v_ratio == (1 << 15)) + height_ok = true; + + if (width_ok & height_ok) + return 0; + + DRM_DEBUG_KMS("scalling is not supported"); + return -ENOTSUPP; +} + static int exynos_plane_atomic_check(struct drm_plane *plane, struct drm_plane_state *state) { @@ -187,6 +233,11 @@ static int exynos_plane_atomic_check(struct drm_plane *plane, /* translate state into exynos_state */ exynos_plane_mode_set(exynos_state); + ret = exynos_drm_plane_check_format(exynos_plane->config, exynos_state); + if (ret) + return ret; + + ret = exynos_drm_plane_check_size(exynos_plane->config, exynos_state); return ret; }