From patchwork Thu Nov 26 13:47:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanwoo Choi X-Patchwork-Id: 7706931 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 386879F2EC for ; Thu, 26 Nov 2015 13:49:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4D25220797 for ; Thu, 26 Nov 2015 13:49:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EDFC9207A2 for ; Thu, 26 Nov 2015 13:49:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752442AbbKZNsB (ORCPT ); Thu, 26 Nov 2015 08:48:01 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:48418 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752056AbbKZNrt (ORCPT ); Thu, 26 Nov 2015 08:47:49 -0500 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NYF00SU4CZH4F40@mailout2.samsung.com>; Thu, 26 Nov 2015 22:47:42 +0900 (KST) Received: from epcpsbgm1new.samsung.com ( [172.20.52.113]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 92.2A.30395.D7D07565; Thu, 26 Nov 2015 22:47:41 +0900 (KST) X-AuditID: cbfee68f-f79666d0000076bb-c0-56570d7d948b Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id CA.B8.24993.D7D07565; Thu, 26 Nov 2015 22:47:41 +0900 (KST) Received: from chan.10.32.193.11 ([10.252.81.195]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NYF00D4UCZGTXL0@mmp1.samsung.com>; Thu, 26 Nov 2015 22:47:41 +0900 (KST) From: Chanwoo Choi To: myungjoo.ham@samsung.com, kyungmin.park@samsung.com, kgene@kernel.org, k.kozlowski@samsung.com Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, cw00.choi@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: [RFC PATCH 14/15] ARM: dts: Add bus nodes using VDD_INT for Exynos4x12 Date: Thu, 26 Nov 2015 22:47:38 +0900 Message-id: <1448545659-32287-15-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1448545659-32287-1-git-send-email-cw00.choi@samsung.com> References: <1448545659-32287-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprKIsWRmVeSWpSXmKPExsWyRsSkULeWNzzMYP46S4vrX56zWsw/co7V ov/NQlaLc69WMlq8fmFo0f/4NbPF2aY37BaXd81hs/jce4TRYsb5fUwWty/zWiy9fhHIaFzB ZjFh+loWi9a9R9gt2lZ/YHUQ8Fgzbw2jR0tzD5vH5b5eJo+Vy7+weWxa1cnm8e8Yu0ffllWM Hp83yQVwRHHZpKTmZJalFunbJXBlbFjSyVwwQaZixyzvBsZmsS5GTg4JAROJc3vamCFsMYkL 99azdTFycQgJrGCUOPbvEjtM0b+bN1khEksZJea/38cI4XxhlDh79gIbSBWbgJbE/hc3wGwR gRSJvzdngxUxCxxikjjz7ggTSEJYwF+i72oL2FgWAVWJPZvvMoLYvAJuEt23djFCrJOT+LDn EVgNJ1D81JVJYHEhAVeJyR97wO6TEPjILrGxs5MVYpCAxLfJh1i6GDmAErISmw5A/SMpcXDF DZYJjMILGBlWMYqmFiQXFCelFxnrFSfmFpfmpesl5+duYgTG1ul/z/p3MN49YH2IUYCDUYmH t8A2LEyINbGsuDL3EKMp0IaJzFKiyfnACM4riTc0NjOyMDUxNTYytzRTEuddKPUzWEggPbEk NTs1tSC1KL6oNCe1+BAjEwenVAPjwpj5OxUrlqS9O5/76RPvOzaNwveNsgkeKybkRW72upX4 wTTW/apV6CHPGSf9H7x9cGif1uTo/xcVt1Ro/wqPWLJw5of7npvuv2JZWHTqu6DRprW/Gs5u fSW+ne8np/i8a1M/Gzz+e73yxHtlv+33dOPSvkflVgjd/GC74atIhcfN1iP3sp/e3qzEUpyR aKjFXFScCAC3DoXjqAIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrEIsWRmVeSWpSXmKPExsVy+t9jAd1a3vAwg7kTjS2uf3nOajH/yDlW i/43C1ktzr1ayWjx+oWhRf/j18wWZ5vesFtc3jWHzeJz7xFGixnn9zFZ3L7Ma7H0+kUgo3EF m8WE6WtZLFr3HmG3aFv9gdVBwGPNvDWMHi3NPWwel/t6mTxWLv/C5rFpVSebx79j7B59W1Yx enzeJBfAEdXAaJORmpiSWqSQmpecn5KZl26r5B0c7xxvamZgqGtoaWGupJCXmJtqq+TiE6Dr lpkD9ICSQlliTilQKCCxuFhJ3w7ThNAQN10LmMYIXd+QILgeIwM0kLCGMWPDkk7mggkyFTtm eTcwNot1MXJySAiYSPy7eZMVwhaTuHBvPVsXIxeHkMBSRon57/cxQjhfGCXOnr3ABlLFJqAl sf/FDTBbRCBF4u/N2WBFzAKHmCTOvDvCBJIQFvCX6Lvawg5iswioSuzZfJcRxOYVcJPovrWL EWKdnMSHPY/AajiB4qeuTAKLCwm4Skz+2MM2gZF3ASPDKkaJ1ILkguKk9FzDvNRyveLE3OLS vHS95PzcTYzg+H0mtYPx4C73Q4wCHIxKPLwFtmFhQqyJZcWVuYcYJTiYlUR4b7GEhwnxpiRW VqUW5ccXleakFh9iNAU6bCKzlGhyPjC15JXEGxqbmBlZGpkbWhgZmyuJ817Y7xcmJJCeWJKa nZpakFoE08fEwSnVwNhbdvPZc4vZBzg/Ge5ddmvSjX0P7xg9niDA2PnTL8v5fIk8W2zrgdh+ ri4DideFaS9NTbWKzKZEO1S/nflL/N6rpSeepGhmrjZI6Typ3390+bT5bl/yU0+frl559rpn g/YEzdz6rc2SJW4BF04FHjk7s8V13oP0bWkPu846/m/J5e+LuvvniaYSS3FGoqEWc1FxIgDU AjWQ9QIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the bus noes using VDD_INT for Exynos4x12 SoC. Exynos4x12 has the following AXI buses to translate data between DRAM and sub-blocks. Following list specifies the detailed relation between DRAM and sub-blocks: - ACLK100 clock for PERIL/PERIR/MFC(PCLK) - ACLK160 clock for CAM/TV/LCD - ACLK133 clock for FSYS - GDL clock for LEFTBUS - GDR clock for RIGHTBUS - SCLK_MFC clock for MFC Signed-off-by: Chanwoo Choi --- arch/arm/boot/dts/exynos4x12.dtsi | 119 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 119 insertions(+) diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index c7ab2825d7cd..1b90d4984e35 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -355,6 +355,125 @@ }; }; + bus_leftbus: bus_leftbus { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_GDL>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_rightbus: bus_leftbus { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_GDR>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_display: bus_display { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_ACLK160>; + clock-names = "bus"; + operating-points-v2 = <&bus_display_opp_table>; + status = "disabled"; + }; + + bus_fsys: bus_fsys { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_ACLK133>; + clock-names = "bus"; + operating-points-v2 = <&bus_fsys_opp_table>; + status = "disabled"; + }; + + bus_peri: bus_peri { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_ACLK100>; + clock-names = "bus"; + operating-points-v2 = <&bus_peri_opp_table>; + status = "disabled"; + }; + + bus_mfc: bus_mfc { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_SCLK_MFC>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_leftbus_opp_table: opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <133000000>; + opp-microvolt = <925000>; + }; + opp02 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <950000>; + }; + opp03 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_display_opp_table: opp_table2 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <133000000>; + opp-microvolt = <925000>; + }; + opp02 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <950000>; + }; + opp03 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_fsys_opp_table: opp_table3 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <133000000>; + opp-microvolt = <925000>; + }; + }; + + bus_peri_opp_table: opp_table4 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <925000>; + }; + }; }; &combiner {