From patchwork Wed Dec 2 21:19:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Gamari X-Patchwork-Id: 7753061 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BBCDE9F39D for ; Wed, 2 Dec 2015 21:29:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CC9F920546 for ; Wed, 2 Dec 2015 21:29:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E3B392053E for ; Wed, 2 Dec 2015 21:29:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932187AbbLBV32 (ORCPT ); Wed, 2 Dec 2015 16:29:28 -0500 Received: from mail.smart-cactus.org ([54.187.36.80]:50814 "EHLO mail.smart-cactus.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756693AbbLBV3U (ORCPT ); Wed, 2 Dec 2015 16:29:20 -0500 Received: from localhost.localdomain (HSI-KBW-149-172-43-78.hsi13.kabel-badenwuerttemberg.de [149.172.43.78]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (Client did not present a certificate) (Authenticated sender: ben@smart-cactus.org) by mail.smart-cactus.org (Postfix) with ESMTPSA id 92BE764B68; Wed, 2 Dec 2015 21:07:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mail.smart-cactus.org; s=mail; t=1449090474; bh=bbmADxwhOLB6qNCaFNM308NsqUDGmcLWo0dmsv8m8Jg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kRy+qsK1bjuHg3Ubfzck9wvRIi664YbzVTDdCg6C0hdx7KlAbH/3QEgBfX8U84yii NFWJvfstvjzSFyOwZifJjuvjDRQj6cGmz1Xd6bJ9dBNFbXaCdLRLBJuhGeDJEgxQ87 nqPCINqIfRqxuyOkniVb0uVMra1yf55ZPidRFits= From: Ben Gamari To: Thomas Abraham , Sylwester Nawrocki , Michael Turquette , Kukjin Kim , Kukjin Kim , Viresh Kumar , Krzysztof Kozlowski Cc: Tomasz Figa , Lukasz Majewski , Heiko Stuebner , Chanwoo Choi , Kevin Hilman , Javier Martinez Canillas , Tobias Jakobi , Anand Moon , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com, Ben Gamari , Javier Martinez Canillas Subject: [PATCH 07/12] ARM: dts: Exynos5422: fix OPP tables Date: Wed, 2 Dec 2015 22:19:22 +0100 Message-Id: <1449091167-20758-8-git-send-email-ben@smart-cactus.org> X-Mailer: git-send-email 2.6.2 In-Reply-To: <1449091167-20758-1-git-send-email-ben@smart-cactus.org> References: <1449091167-20758-1-git-send-email-ben@smart-cactus.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Exynos 5422 is identical to the 5800 except for the fact that it boots from the A7 cores. Consequently, the core numbering is different: cores 0-3 are A7s whereas 4-7 are A15s. We can reuse the device tree of the 5800 for the 5422 but we must take care to override the OPP tables and CPU clocks. These are otherwise inherited from the exynos5800 devicetree, which has the CPU clusters reversed compared to the 5422. This results in the A15 cores only reaching 1.4GHz, the maximum rate of the KFC clock. Cc: Javier Martinez Canillas Signed-off-by: Ben Gamari --- arch/arm/boot/dts/exynos5422-cpus.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi index b7f60c8..9a5131d 100644 --- a/arch/arm/boot/dts/exynos5422-cpus.dtsi +++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi @@ -20,8 +20,10 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x100>; + clocks = <&clock CLK_KFC_CLK>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cpu1_opp_table>; }; &cpu1 { @@ -30,6 +32,7 @@ reg = <0x101>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cpu1_opp_table>; }; &cpu2 { @@ -38,6 +41,7 @@ reg = <0x102>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cpu1_opp_table>; }; &cpu3 { @@ -46,14 +50,17 @@ reg = <0x103>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cpu1_opp_table>; }; &cpu4 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; + clocks = <&clock CLK_ARM_CLK>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cpu0_opp_table>; }; &cpu5 { @@ -62,6 +69,7 @@ reg = <0x1>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cpu0_opp_table>; }; &cpu6 { @@ -70,6 +78,7 @@ reg = <0x2>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cpu0_opp_table>; }; &cpu7 { @@ -78,4 +87,5 @@ reg = <0x3>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cpu0_opp_table>; };