From patchwork Fri Dec 4 17:30:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 7770601 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6EA589F39B for ; Fri, 4 Dec 2015 17:34:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7535C2049E for ; Fri, 4 Dec 2015 17:34:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 78D5D20498 for ; Fri, 4 Dec 2015 17:34:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756617AbbLDRca (ORCPT ); Fri, 4 Dec 2015 12:32:30 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:35680 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756622AbbLDRc0 (ORCPT ); Fri, 4 Dec 2015 12:32:26 -0500 Received: from epcpsbgm1new.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NYU01H8EGQ0RGB0@mailout2.samsung.com>; Sat, 05 Dec 2015 02:32:24 +0900 (KST) X-AuditID: cbfee61a-f79266d000003652-e2-5661ce282257 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id 2C.BF.13906.82EC1665; Sat, 5 Dec 2015 02:32:24 +0900 (KST) Received: from AMDC1976.DIGITAL.local ([106.120.53.102]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NYU00GMAGOFMR10@mmp2.samsung.com>; Sat, 05 Dec 2015 02:32:24 +0900 (KST) From: Bartlomiej Zolnierkiewicz To: Thomas Abraham , Sylwester Nawrocki , Mike Turquette , Kukjin Kim , Kukjin Kim , Viresh Kumar , Krzysztof Kozlowski , Ben Gamari Cc: Tomasz Figa , Lukasz Majewski , Heiko Stuebner , Chanwoo Choi , Kevin Hilman , Javier Martinez Canillas , Tobias Jakobi , Anand Moon , linux-samsung-soc@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com Subject: [PATCH v3 06/10] clk: samsung: exynos5800: fix cpu clock configuration data Date: Fri, 04 Dec 2015 18:30:31 +0100 Message-id: <1449250235-9613-7-git-send-email-b.zolnierkie@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1449250235-9613-1-git-send-email-b.zolnierkie@samsung.com> References: <1449250235-9613-1-git-send-email-b.zolnierkie@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrELMWRmVeSWpSXmKPExsVy+t9jQV2Nc4lhBsu2ClpsnLGe1WLW/Lss Fte/PGe1+P/oNavFm7drmCxevzC06F1wlc2i//FrZouvh1cwWrx5uJnRYtPja6wWl3fNYbP4 3HuE0WLG+X1MFus23mK3eDrhIpvF4TftrBYdyxgt2lZ/YLVYtesPo8XGrx4Ooh47Z91l99i0 qpPN4861PWwem5fUe/w7xu6xpR8o3LdlFaPHmd/OHtuvzWP2+LxJLoArissmJTUnsyy1SN8u gStjZ0MfS8EciYqelwfYGxiniHQxcnJICJhIPG68xwZhi0lcuLceyObiEBKYxSixq3k/lPOL UeLpjS1MIFVsAlYSE9tXMYIkRASOMUk8ar3JDuIwC7xmljh68C9YlbBAmMTc/p8sIDaLgKrE py1fmUFsXgF3iQ2PFzBC7JOTOHlsMiuIzSngIXF6WxdYjRBQTe/7fSwTGHkXMDKsYpRILUgu KE5KzzXMSy3XK07MLS7NS9dLzs/dxAiOiWdSOxgP7nI/xCjAwajEw8uwKSFMiDWxrLgy9xCj BAezkggvs0ximBBvSmJlVWpRfnxRaU5q8SFGaQ4WJXHe2kuRYUIC6YklqdmpqQWpRTBZJg5O qQZGvp0vvRt+XAx2TbhZu/TuK7aOWx/DFHY69ohO8tp4NXvl0++b78zZpKHq8Mmn7q5+2M97 Nv23zBYd+e2yz0ace4ausFnl0R2bJ3P3GXLJTo3ulM7iTJ1n/HXP+V2bJNYsuKAutFCFIdYt Xdi42VrXQz2OXSr6mnYT+ykDFxlJra1vy2/c/zhHiaU4I9FQi7moOBEADwZ1KYUCAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix cpu clock configuration data for Exynos5800 (it uses higher PCLK_DBG divider values than Exynos5420 and supports additional frequencies). Based on Hardkernel's kernel for ODROID-XU3 board. Cc: Tomasz Figa Cc: Mike Turquette Cc: Javier Martinez Canillas Cc: Thomas Abraham Signed-off-by: Bartlomiej Zolnierkiewicz Acked-by: Sylwester Nawrocki --- drivers/clk/samsung/clk-exynos5420.c | 36 +++++++++++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 2a92546..837329d 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -1274,10 +1274,34 @@ static const struct exynos_cpuclk_cfg_data exynos5420_eglclk_d[] __initconst = { { 0 }, }; +static const struct exynos_cpuclk_cfg_data exynos5800_eglclk_d[] __initconst = { + { 2000000, E5420_EGL_DIV0(3, 7, 7, 4), }, + { 1900000, E5420_EGL_DIV0(3, 7, 7, 4), }, + { 1800000, E5420_EGL_DIV0(3, 7, 7, 4), }, + { 1700000, E5420_EGL_DIV0(3, 7, 7, 3), }, + { 1600000, E5420_EGL_DIV0(3, 7, 7, 3), }, + { 1500000, E5420_EGL_DIV0(3, 7, 7, 3), }, + { 1400000, E5420_EGL_DIV0(3, 7, 7, 3), }, + { 1300000, E5420_EGL_DIV0(3, 7, 7, 2), }, + { 1200000, E5420_EGL_DIV0(3, 7, 7, 2), }, + { 1100000, E5420_EGL_DIV0(3, 7, 7, 2), }, + { 1000000, E5420_EGL_DIV0(3, 7, 6, 2), }, + { 900000, E5420_EGL_DIV0(3, 7, 6, 2), }, + { 800000, E5420_EGL_DIV0(3, 7, 5, 2), }, + { 700000, E5420_EGL_DIV0(3, 7, 5, 2), }, + { 600000, E5420_EGL_DIV0(3, 7, 4, 2), }, + { 500000, E5420_EGL_DIV0(3, 7, 3, 2), }, + { 400000, E5420_EGL_DIV0(3, 7, 3, 2), }, + { 300000, E5420_EGL_DIV0(3, 7, 3, 2), }, + { 200000, E5420_EGL_DIV0(3, 7, 3, 2), }, + { 0 }, +}; + #define E5420_KFC_DIV(kpll, pclk, aclk) \ ((((kpll) << 24) | ((pclk) << 20) | ((aclk) << 4))) static const struct exynos_cpuclk_cfg_data exynos5420_kfcclk_d[] __initconst = { + { 1400000, E5420_KFC_DIV(3, 5, 3), }, /* for Exynos5800 */ { 1300000, E5420_KFC_DIV(3, 5, 2), }, { 1200000, E5420_KFC_DIV(3, 5, 2), }, { 1100000, E5420_KFC_DIV(3, 5, 2), }, @@ -1357,9 +1381,15 @@ static void __init exynos5x_clk_init(struct device_node *np, ARRAY_SIZE(exynos5800_gate_clks)); } - exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", - mout_cpu_p[0], mout_cpu_p[1], 0x200, - exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0); + if (soc == EXYNOS5420) { + exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", + mout_cpu_p[0], mout_cpu_p[1], 0x200, + exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0); + } else { + exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", + mout_cpu_p[0], mout_cpu_p[1], 0x200, + exynos5800_eglclk_d, ARRAY_SIZE(exynos5800_eglclk_d), 0); + } exynos_register_cpu_clock(ctx, CLK_KFC_CLK, "kfcclk", mout_kfc_p[0], mout_kfc_p[1], 0x28200, exynos5420_kfcclk_d, ARRAY_SIZE(exynos5420_kfcclk_d), 0);