From patchwork Wed Dec 9 04:07:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanwoo Choi X-Patchwork-Id: 7804171 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 86E629F349 for ; Wed, 9 Dec 2015 04:14:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AAD5C20490 for ; Wed, 9 Dec 2015 04:14:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A25D8203C4 for ; Wed, 9 Dec 2015 04:14:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753460AbbLIEJr (ORCPT ); Tue, 8 Dec 2015 23:09:47 -0500 Received: from mailout4.samsung.com ([203.254.224.34]:59167 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751514AbbLIEIU (ORCPT ); Tue, 8 Dec 2015 23:08:20 -0500 Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NZ201FE9OTRI290@mailout4.samsung.com>; Wed, 09 Dec 2015 13:08:15 +0900 (KST) Received: from epcpsbgm1new.samsung.com ( [172.20.52.115]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id 71.0D.04886.F29A7665; Wed, 9 Dec 2015 13:08:15 +0900 (KST) X-AuditID: cbfee690-f79646d000001316-ca-5667a92f6402 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id CC.67.13906.F29A7665; Wed, 9 Dec 2015 13:08:15 +0900 (KST) Received: from chan.10.32.193.11 ([10.113.62.212]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NZ200G00OTQA230@mmp2.samsung.com>; Wed, 09 Dec 2015 13:08:15 +0900 (KST) From: Chanwoo Choi To: myungjoo.ham@samsung.com, k.kozlowski@samsung.com, kgene@kernel.org Cc: kyungmin.park@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, linux.amoon@gmail.com, cw00.choi@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 03/19] ARM: dts: Add DMC bus node for Exynos3250 Date: Wed, 09 Dec 2015 13:07:55 +0900 Message-id: <1449634091-1842-4-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> References: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHIsWRmVeSWpSXmKPExsWyRsSkWFd/ZXqYwcV3ZhbXvzxntZh/5Byr Rf+bhawW516tZLR4/cLQov/xa2aLs01v2C0u75rDZvG59wijxYzz+5gs1m28xW5x+zKvxdLr F5ksbjeuYLOYMH0ti0Xr3iPsFm2rP7A6CHqsmbeG0aOluYfN43JfL5PHzll32T1WLv/C5rFp VSebx79j7B59W1YxenzeJBfAGcVlk5Kak1mWWqRvl8CVsfnWf9aChzwVU/tPMTcwvufsYuTk kBAwkZjZ8J0ZwhaTuHBvPVsXIxeHkMAKRom5Bw4wwxQtbv7JCJGYxSjxYNsEKOcLo8Tna61s IFVsAloS+1/cALNFBNwlvt7bDTaKWeALk0TrZJAdHBzCAs4Sb/bwg9SwCKhKLFz8hwnE5hVw kTj7dD0jxDY5iQ97HrGD2JwCrhJXtr8DiwsB1Rx72sQEUdPKIXHzVzTEHAGJb5MPsYCMlxCQ ldgEc7SkxMEVN1gmMAovYGRYxSiaWpBcUJyUXmSiV5yYW1yal66XnJ+7iREYbaf/PZuwg/He AetDjAIcjEo8vBdc0sOEWBPLiitzDzGaAm2YyCwlmpwPjOm8knhDYzMjC1MTU2Mjc0szJXHe 11I/g4UE0hNLUrNTUwtSi+KLSnNSiw8xMnFwSjUwTrCIyeK9/9n8Vp935pO4yh4L19SaAI63 SYsv3rsWcohdqm3tgiSOHz3nVxyr6en7ts1IUO+se+Hy6a8f6C824/266+ekfe8+9+l5f6ud MXFnr3Q5q8mMr55C3278UH1W3lkcKmdn8jkxn6GTq3SuSGyjJw8Dk41Fluk7zhu/Z2SFz2B8 2f5EiaU4I9FQi7moOBEAhkrw9rECAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrDIsWRmVeSWpSXmKPExsVy+t9jQV39lelhBo/aDC2uf3nOajH/yDlW i/43C1ktzr1ayWjx+oWhRf/j18wWZ5vesFtc3jWHzeJz7xFGixnn9zFZrNt4i93i9mVei6XX LzJZ3G5cwWYxYfpaFovWvUfYLdpWf2B1EPRYM28No0dLcw+bx+W+XiaPnbPusnusXP6FzWPT qk42j3/H2D36tqxi9Pi8SS6AM6qB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJc SSEvMTfVVsnFJ0DXLTMH6BUlhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGEN Y8bmW/9ZCx7yVEztP8XcwPies4uRk0NCwERicfNPRghbTOLCvfVsXYxcHEICsxglHmybwAjh fGGU+HytlQ2kik1AS2L/ixtgtoiAu8TXe7vBOpgFvjBJtE7+ztzFyMEhLOAs8WYPP0gNi4Cq xMLFf5hAbF4BF4mzT9dDbZOT+LDnETuIzSngKnFl+zuwuBBQzbGnTUwTGHkXMDKsYpRILUgu KE5KzzXMSy3XK07MLS7NS9dLzs/dxAiO6WdSOxgP7nI/xCjAwajEw3vBJT1MiDWxrLgy9xCj BAezkgivVi1QiDclsbIqtSg/vqg0J7X4EKMp0GETmaVEk/OB6SavJN7Q2MTMyNLI3NDCyNhc SZy39lJkmJBAemJJanZqakFqEUwfEwenVAPjrHOJhuJno7zPfbi1Xpf5/cx5vqvTG+ZWRt50 m/drs35Hm53Fmv620gmt2/5f/x576fP6ucyfuOx4zx28+PaY3eFF+7NM77je37mwcuKRia7T mzW7t6/4rvD8ve/56HLtyUtk97vkbLZuOlP//lLDn/OlE797SH97cnTu3zvWh5PSWKO1dc8n 71RiKc5INNRiLipOBAAVgwwk/wIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC. The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard SDRAM devices. The bus includes the OPP tables and the source clock for DMC block. Following list specifies the detailed relation between the clock and DMC block: - The source clock of DMC block : div_dmc Signed-off-by: Chanwoo Choi --- arch/arm/boot/dts/exynos3250.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 2f30d632f1cc..7214c5e42150 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -687,6 +687,40 @@ clock-names = "ppmu"; status = "disabled"; }; + + bus_dmc: bus_dmc { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_dmc CLK_DIV_DMC>; + clock-names = "bus"; + operating-points-v2 = <&bus_dmc_opp_table>; + status = "disabled"; + }; + + bus_dmc_opp_table: opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <800000>; + }; + opp01 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <800000>; + }; + opp02 { + opp-hz = /bits/ 64 <134000000>; + opp-microvolt = <800000>; + }; + opp03 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <800000>; + }; + opp04 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <875000>; + }; + }; }; };