From patchwork Wed Dec 9 04:08:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanwoo Choi X-Patchwork-Id: 7804461 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 41CCA9F349 for ; Wed, 9 Dec 2015 04:16:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8C10620499 for ; Wed, 9 Dec 2015 04:16:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 358EB200C1 for ; Wed, 9 Dec 2015 04:16:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753196AbbLIEJS (ORCPT ); Tue, 8 Dec 2015 23:09:18 -0500 Received: from mailout1.samsung.com ([203.254.224.24]:59296 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752757AbbLIEIY (ORCPT ); Tue, 8 Dec 2015 23:08:24 -0500 Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NZ201OK0OTSBCC0@mailout1.samsung.com>; Wed, 09 Dec 2015 13:08:16 +0900 (KST) Received: from epcpsbgm1new.samsung.com ( [172.20.52.115]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id E9.0D.04886.039A7665; Wed, 9 Dec 2015 13:08:16 +0900 (KST) X-AuditID: cbfee690-f79646d000001316-dc-5667a930372d Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id 82.77.13906.039A7665; Wed, 9 Dec 2015 13:08:16 +0900 (KST) Received: from chan.10.32.193.11 ([10.113.62.212]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NZ200G00OTQA230@mmp2.samsung.com>; Wed, 09 Dec 2015 13:08:15 +0900 (KST) From: Chanwoo Choi To: myungjoo.ham@samsung.com, k.kozlowski@samsung.com, kgene@kernel.org Cc: kyungmin.park@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, linux.amoon@gmail.com, cw00.choi@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 08/19] PM / devfreq: exynos: Add support of bus frequency of sub-blocks using passive governor Date: Wed, 09 Dec 2015 13:08:00 +0900 Message-id: <1449634091-1842-9-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> References: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrAIsWRmVeSWpSXmKPExsWyRsSkWNdgZXqYQWuPusX1L89ZLeYfOcdq 0f9mIavFuVcrGS1evzC06H/8mtnibNMbdovLu+awWXzuPcJoMeP8PiaLdRtvsVvcvsxrsfT6 RSaL240r2CwmTF/LYtG69wi7RdvqD6wOgh5r5q1h9Ghp7mHzuNzXy+Sxc9Zddo+Vy7+weWxa 1cnm8e8Yu0ffllWMHp83yQVwRnHZpKTmZJalFunbJXBlvHp6mKmgwaOi9VgjWwPjNcsuRk4O CQETiacd69khbDGJC/fWs3UxcnEICaxglNh/dBELTNHj/ufMEIlZjBJHXxxhgXC+MEp8vtbK BlLFJqAlsf/FDTBbRMBd4uu93WCjmAW+MEm0Tv7ODJIQFiiW+Dp9BSOIzSKgKrHyzhywBl4B F4mXH2ewQayTk/iw5xHYTZwCrhJXtr8DqxcCqjn2tIkJZKiEQCOHxMXnjWwQgwQkvk0+BHQS B1BCVmLTAWaIOZISB1fcYJnAKLyAkWEVo2hqQXJBcVJ6kYlecWJucWleul5yfu4mRmDEnf73 bMIOxnsHrA8xCnAwKvHwXnBJDxNiTSwrrsw9xGgKtGEis5Rocj4wrvNK4g2NzYwsTE1MjY3M Lc2UxHlfS/0MFhJITyxJzU5NLUgtii8qzUktPsTIxMEp1cA4WfH/+ccl99L/9wVPU5eMS77Q ojRR7K7hHKl73tdmHj3K2qxwL6anpPPjmp5/Lrv+L8pnq4o4qPS3RG/O87xLDD/451VpZK+4 UaWvd3XaGQ03A1XnLW43Kp+wOcuJeqn9neK4nitJQfzyr+kh++wz0ideC5F1C9q4Trj+99Pg Fb32BlIGPquUWIozEg21mIuKEwFiZ86aswIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrLIsWRmVeSWpSXmKPExsVy+t9jQV2DlelhBhP+yVtc//Kc1WL+kXOs Fv1vFrJanHu1ktHi9QtDi/7Hr5ktzja9Ybe4vGsOm8Xn3iOMFjPO72OyWLfxFrvF7cu8Fkuv X2SyuN24gs1iwvS1LBate4+wW7St/sDqIOixZt4aRo+W5h42j8t9vUweO2fdZfdYufwLm8em VZ1sHv+OsXv0bVnF6PF5k1wAZ1QDo01GamJKapFCal5yfkpmXrqtkndwvHO8qZmBoa6hpYW5 kkJeYm6qrZKLT4CuW2YO0CtKCmWJOaVAoYDE4mIlfTtME0JD3HQtYBojdH1DguB6jAzQQMIa xoxXTw8zFTR4VLQea2RrYLxm2cXIySEhYCLxuP85M4QtJnHh3nq2LkYuDiGBWYwSR18cYYFw vjBKfL7WygZSxSagJbH/xQ0wW0TAXeLrvd1gHcwCX5gkWid/BxslLFAs8XX6CkYQm0VAVWLl nTlgDbwCLhIvP85gg1gnJ/FhzyN2EJtTwFXiyvZ3YPVCQDXHnjYxTWDkXcDIsIpRIrUguaA4 KT3XMC+1XK84Mbe4NC9dLzk/dxMjOKqfSe1gPLjL/RCjAAejEg/vBZf0MCHWxLLiytxDjBIc zEoivFq1QCHelMTKqtSi/Pii0pzU4kOMpkCHTWSWEk3OByacvJJ4Q2MTMyNLI3NDCyNjcyVx 3tpLkWFCAumJJanZqakFqUUwfUwcnFINjAxTwm5aH/22zEjQ2zXN0s2hfGbU11v7lzDul7U5 uIRHfuI5AxbeXarzKrqXvbBIPqs37fY5pUmLlq3tvvHT9cOJGeVLOX7K+G67ovbkwZ6FW13Z Nd1tc9OqVhXM9Xa8XzVr3t0nbM/Y+76X8rWbvHQTCvnJYjl75Zn98xYI71vGd6So99LW+H1K LMUZiYZazEXFiQDfIbukAAMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the support of bus frequency feature for sub-blocks which share the one power line. If each bus depends on the power line, each bus is not able to change the voltage by oneself. To optimize the power-consumption on runtime, some buses using the same power line should change the source clock and regulator at the same time. So, this patch uses the passive governor to support the bus frequency for all buses which sharing the one power line. For example, Exynos3250 include the two power line for AXI buses as following: : VDD_MIF : MIF (Memory Interface) provide the DMC (Dynamic Memory Controller) with the power (regulator). : VDD_INT : INT (Internal) provide the various sub-blocks with the power (regulator). Each bus is included in as follwoing block. In the case of VDD_MIF, only DMC bus use the power line. So, there is no any depencency between buese. But, in the case of VDD_INT, various buses share the one power line of VDD_INT. We need to make the depenency between buses. When using passive governor, there is no problem to support the bus frequency as DVFS for all buses. One bus should be operated as the parent bus device which gathering the current load of INT block and then decides the new frequency with some governors except of passive governor. After deciding the new frequency by the parent bus device, the rest bus devices will change the each source clock according to new frequency of the parent bus device. - MIF (Memory Interface) block : VDD_MIF |--- DMC - INT (Internal) block : VDD_INT |--- LEFTBUS (parent) |--- PERIL |--- MFC |--- G3D |--- RIGHTBUS |--- FSYS |--- LCD0 |--- PERIR |--- ISP |--- CAM Signed-off-by: Chanwoo Choi --- drivers/devfreq/Kconfig | 1 + drivers/devfreq/exynos/exynos-bus.c | 170 ++++++++++++++++++++++++++++-------- 2 files changed, 136 insertions(+), 35 deletions(-) diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig index d03f635a93e1..88f7cc4539b8 100644 --- a/drivers/devfreq/Kconfig +++ b/drivers/devfreq/Kconfig @@ -79,6 +79,7 @@ config ARM_EXYNOS_BUS_DEVFREQ bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver" depends on ARCH_EXYNOS select DEVFREQ_GOV_SIMPLE_ONDEMAND + select DEVFREQ_GOV_PASSIVE select DEVFREQ_EVENT_EXYNOS_PPMU select PM_DEVFREQ_EVENT select PM_OPP diff --git a/drivers/devfreq/exynos/exynos-bus.c b/drivers/devfreq/exynos/exynos-bus.c index f1bc20839650..2efc2bba757e 100644 --- a/drivers/devfreq/exynos/exynos-bus.c +++ b/drivers/devfreq/exynos/exynos-bus.c @@ -91,7 +91,7 @@ static int exynos_bus_get_event(struct exynos_bus *bus, } /* - * Must necessary function for devfreq governor + * Must necessary function for devfreq simple-ondemand governor */ static int exynos_bus_target(struct device *dev, unsigned long *freq, u32 flags) { @@ -205,57 +205,74 @@ static void exynos_bus_exit(struct device *dev) dev_pm_opp_of_remove_table(dev); } -static int exynos_bus_parse_of(struct device_node *np, - struct exynos_bus *bus) +/* + * Must necessary function for devfreq passive governor + */ +static int exynos_bus_passive_target(struct device *dev, unsigned long *freq, + u32 flags) { - struct device *dev = bus->dev; - unsigned long rate; - int i, ret, count, size; + struct exynos_bus *bus = dev_get_drvdata(dev); + struct dev_pm_opp *new_opp; + unsigned long old_freq, new_freq; + int ret = 0; - /* Get the clock to provide each bus with source clock */ - bus->clk = devm_clk_get(dev, "bus"); - if (IS_ERR(bus->clk)) { - dev_err(dev, "failed to get bus clock\n"); - return PTR_ERR(bus->clk); + /* Get new opp-bus instance according to new bus clock */ + rcu_read_lock(); + new_opp = devfreq_recommended_opp(dev, freq, flags); + if (IS_ERR_OR_NULL(new_opp)) { + dev_err(dev, "failed to get recommed opp instance\n"); + rcu_read_unlock(); + return PTR_ERR(new_opp); } - ret = clk_prepare_enable(bus->clk); - if (ret < 0) { - dev_err(dev, "failed to get enable clock\n"); - return ret; - } + new_freq = dev_pm_opp_get_freq(new_opp); + old_freq = dev_pm_opp_get_freq(bus->curr_opp); + rcu_read_unlock(); - /* Get the freq/voltage OPP table to scale the bus frequency */ - rcu_read_lock(); - ret = dev_pm_opp_of_add_table(dev); + if (old_freq == new_freq) + return 0; + + /* Change the frequency according to new OPP level */ + mutex_lock(&bus->lock); + + ret = clk_set_rate(bus->clk, new_freq); if (ret < 0) { - dev_err(dev, "failed to get OPP table\n"); - rcu_read_unlock(); - return ret; + dev_err(dev, "failed to set the clock of bus\n"); + goto out; } - rate = clk_get_rate(bus->clk); - bus->curr_opp = dev_pm_opp_find_freq_ceil(dev, &rate); - if (IS_ERR(bus->curr_opp)) { - dev_err(dev, "failed to find dev_pm_opp\n"); - rcu_read_unlock(); - ret = PTR_ERR(bus->curr_opp); - goto err_opp; - } - rcu_read_unlock(); + bus->curr_opp = new_opp; + + dev_dbg(dev, "Set the frequency of bus (%ldkHz -> %ldkHz)\n", + old_freq/1000, new_freq/1000); +out: + mutex_unlock(&bus->lock); + + return ret; +} + +static void exynos_bus_passive_exit(struct device *dev) +{ + dev_pm_opp_of_remove_table(dev); +} + +static int exynos_bus_parent_parse_of(struct device_node *np, + struct exynos_bus *bus) +{ + struct device *dev = bus->dev; + int i, ret, count, size; /* Get the regulator to provide each bus with the power */ bus->regulator = devm_regulator_get(dev, "vdd"); if (IS_ERR(bus->regulator)) { dev_err(dev, "failed to get VDD regulator\n"); - ret = PTR_ERR(bus->regulator); - goto err_opp; + return PTR_ERR(bus->regulator); } ret = regulator_enable(bus->regulator); if (ret < 0) { dev_err(dev, "failed to enable VDD regulator\n"); - goto err_opp; + return ret; } /* @@ -302,6 +319,51 @@ static int exynos_bus_parse_of(struct device_node *np, err_regulator: regulator_disable(bus->regulator); + + return ret; +} + +static int exynos_bus_parse_of(struct device_node *np, + struct exynos_bus *bus) +{ + struct device *dev = bus->dev; + unsigned long rate; + int ret; + + /* Get the clock to provide each bus with source clock */ + bus->clk = devm_clk_get(dev, "bus"); + if (IS_ERR(bus->clk)) { + dev_err(dev, "failed to get bus clock\n"); + return PTR_ERR(bus->clk); + } + + ret = clk_prepare_enable(bus->clk); + if (ret < 0) { + dev_err(dev, "failed to get enable clock\n"); + return ret; + } + + /* Get the freq and voltage from OPP table to scale the bus freq */ + rcu_read_lock(); + ret = dev_pm_opp_of_add_table(dev); + if (ret < 0) { + dev_err(dev, "failed to get OPP table\n"); + rcu_read_unlock(); + return ret; + } + + rate = clk_get_rate(bus->clk); + bus->curr_opp = dev_pm_opp_find_freq_ceil(dev, &rate); + if (IS_ERR(bus->curr_opp)) { + dev_err(dev, "failed to find dev_pm_opp\n"); + rcu_read_unlock(); + ret = PTR_ERR(bus->curr_opp); + goto err_opp; + } + rcu_read_unlock(); + + return 0; + err_opp: dev_pm_opp_of_remove_table(dev); @@ -314,6 +376,8 @@ static int exynos_bus_probe(struct platform_device *pdev) struct device_node *np = dev->of_node; struct devfreq_dev_profile *profile; struct devfreq_simple_ondemand_data *ondemand_data; + struct devfreq_passive_data *passive_data; + struct devfreq *parent_devfreq; struct exynos_bus *bus; int ret; @@ -334,10 +398,19 @@ static int exynos_bus_probe(struct platform_device *pdev) if (ret < 0) return ret; - /* Initalize the struct profile and governor data */ profile = devm_kzalloc(dev, sizeof(*profile), GFP_KERNEL); if (!profile) return -ENOMEM; + + if (of_parse_phandle(dev->of_node, "devfreq", 0)) + goto passive; + else + ret = exynos_bus_parent_parse_of(np, bus); + + if (ret < 0) + return ret; + + /* Initalize the struct profile and governor data for parent device */ profile->polling_ms = 50; profile->target = exynos_bus_target; profile->get_dev_status = exynos_bus_get_dev_status; @@ -381,6 +454,33 @@ static int exynos_bus_probe(struct platform_device *pdev) } return 0; + +passive: + /* Initalize the struct profile and governor data for passive device */ + profile->target = exynos_bus_passive_target; + profile->exit = exynos_bus_passive_exit; + + passive_data = devm_kzalloc(dev, sizeof(*passive_data), GFP_KERNEL); + if (!passive_data) + return -ENOMEM; + + /* Get the instance of parent devfreq device */ + parent_devfreq = devfreq_get_devfreq_by_phandle(dev, 0); + if (IS_ERR(parent_devfreq)) { + return -EPROBE_DEFER; + } + passive_data->parent = parent_devfreq; + + /* Add devfreq device for exynos bus with passive governor */ + bus->devfreq = devm_devfreq_add_device(dev, profile, "passive", + passive_data); + if (IS_ERR_OR_NULL(bus->devfreq)) { + dev_err(dev, + "failed to add devfreq dev with passive governor\n"); + return -EPROBE_DEFER; + } + + return 0; } #ifdef CONFIG_PM_SLEEP