From patchwork Wed Dec 16 12:21:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 7861251 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6B3B2BEEE5 for ; Wed, 16 Dec 2015 12:22:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AAE9C20382 for ; Wed, 16 Dec 2015 12:22:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BDA5620416 for ; Wed, 16 Dec 2015 12:22:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932413AbbLPMWU (ORCPT ); Wed, 16 Dec 2015 07:22:20 -0500 Received: from mailout2.w1.samsung.com ([210.118.77.12]:12880 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932862AbbLPMWT (ORCPT ); Wed, 16 Dec 2015 07:22:19 -0500 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NZG00IORAD3G480@mailout2.w1.samsung.com> for linux-samsung-soc@vger.kernel.org; Wed, 16 Dec 2015 12:22:16 +0000 (GMT) X-AuditID: cbfec7f5-f79b16d000005389-c4-56715777888e Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id B1.7F.21385.77751765; Wed, 16 Dec 2015 12:22:15 +0000 (GMT) Received: from amdc1339.digital.local ([106.116.147.30]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NZG0012YACWHH70@eusync4.samsung.com>; Wed, 16 Dec 2015 12:22:15 +0000 (GMT) From: Marek Szyprowski To: dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Inki Dae , Joonyoung Shim , Seung-Woo Kim , Andrzej Hajda , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Tobias Jakobi , Gustavo Padovan Subject: [PATCH v3 7/7] drm/exynos: mixer: unify a check for video-processor window Date: Wed, 16 Dec 2015 13:21:48 +0100 Message-id: <1450268508-15028-8-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1450268508-15028-1-git-send-email-m.szyprowski@samsung.com> References: <1450268508-15028-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrGLMWRmVeSWpSXmKPExsVy+t/xa7rl4YVhBi/mm1vcWneO1WLjjPWs Fle+vmez2PlgF7vFpPsTWCxe3LvIYvH6haHFjPP7mCzWHrnLbjFj8ks2i7bVH1gduD3udx9n 8vh3jN1j56S9TB59W1YxenzeJBfAGsVlk5Kak1mWWqRvl8CVcXPtR7aCHq6K52cusDQw7uHo YuTkkBAwkbhz4R8ThC0mceHeejYQW0hgKaPEvmPVXYxcQHYTk8TrL8/YQRJsAoYSXW+7wIpE BNwkmg7PZAUpYhboY5Zoan4IlhAWCJW49aCLBcRmEVCVuPDnPyOIzSvgIfHmy1VWiG1yEv9f rgDbzCngKbH2+Ex2iM0eEg9W72CewMi7gJFhFaNoamlyQXFSeq6RXnFibnFpXrpecn7uJkZI 6H3dwbj0mNUhRgEORiUeXo2YgjAh1sSy4srcQ4wSHMxKIrwP5QrDhHhTEiurUovy44tKc1KL DzFKc7AoifPO3PU+REggPbEkNTs1tSC1CCbLxMEp1cBYM++n+P+VNoeKeK58bIxaODvk/1nm Rx67p+t4aD7NueuwOr/t8e4YjqkTW7K8W2atiJ6nL5RY1jzxUnsWf9uCdxGutfmfOjxOvfFk WbXn/mczU1UDUxX3lLJHGzjenXmgOyPCPdv13z2+sI9BHw7x1r4Or9IUKNzHEXDXwc2Xe8+v q6bTPB4osRRnJBpqMRcVJwIAlLeDSzkCAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Always use macro instead of hard-coded '2' value in conditions related to video processor window. Additional checks are not needed, because video layer is registered only when video processor is available. Signed-off-by: Marek Szyprowski --- drivers/gpu/drm/exynos/exynos_mixer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 31a9a228744e..bf148dc3623c 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -438,7 +438,7 @@ static void mixer_cfg_layer(struct mixer_context *ctx, unsigned int win, MXR_LAYER_CFG_GRP1_VAL(priority), MXR_LAYER_CFG_GRP1_MASK); break; - case 2: + case VP_DEFAULT_WIN: if (ctx->vp_enabled) { vp_reg_writemask(res, VP_ENABLE, val, VP_ENABLE_ON); mixer_reg_writemask(res, MXR_CFG, val, @@ -990,7 +990,7 @@ static void mixer_update_plane(struct exynos_drm_crtc *crtc, if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) return; - if (plane->index > 1 && mixer_ctx->vp_enabled) + if (plane->index == VP_DEFAULT_WIN) vp_video_buffer(mixer_ctx, plane); else mixer_graph_buffer(mixer_ctx, plane);