From patchwork Fri Jan 22 01:56:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yakir Yang X-Patchwork-Id: 8086971 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5870FBEEE5 for ; Fri, 22 Jan 2016 01:57:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 677C920456 for ; Fri, 22 Jan 2016 01:57:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2B0D92045E for ; Fri, 22 Jan 2016 01:57:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752767AbcAVB5E (ORCPT ); Thu, 21 Jan 2016 20:57:04 -0500 Received: from lucky1.263xmail.com ([211.157.147.130]:55356 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751785AbcAVB4c (ORCPT ); Thu, 21 Jan 2016 20:56:32 -0500 Received: from ykk?rock-chips.com (unknown [192.168.167.153]) by lucky1.263xmail.com (Postfix) with SMTP id 540111E89AD; Fri, 22 Jan 2016 09:56:27 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 8B467247D8; Fri, 22 Jan 2016 09:56:21 +0800 (CST) X-RL-SENDER: ykk@rock-chips.com X-FST-TO: inki.dae@samsung.com X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: <4886d70c89f64d30bd2d0804eb24a9a6> X-ATTACHMENT-NUM: 0 X-SENDER: ykk@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [103.29.142.67]) by smtp.263.net (Postfix) whith ESMTP id 30889OKMU3M; Fri, 22 Jan 2016 09:56:24 +0800 (CST) From: Yakir Yang To: Inki Dae , Kyungmin Park , Jingoo Han , Thierry Reding , Krzysztof Kozlowski , Rob Herring , Heiko Stuebner , Mark Yao Cc: Russell King , emil.l.velikov@gmail.com, Gustavo Padovan , Kishon Vijay Abraham I , javier@osg.samsung.com, Andy Yan , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Yakir Yang Subject: [PATCH v13 15/17] drm: bridge: analogix/dp: add edid modes parse in get_modes method Date: Fri, 22 Jan 2016 09:56:26 +0800 Message-Id: <1453427786-24655-1-git-send-email-ykk@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453427614-23053-1-git-send-email-ykk@rock-chips.com> References: <1453427614-23053-1-git-send-email-ykk@rock-chips.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Display Port monitor could support kinds of mode which indicate in monitor edid, not just one single display resolution which defined in panel or devivetree property display timing. Note: Gustavo Padovan try to remove the controller and phy power on function in bind time at bellow commit: drm/exynos: do not start enabling DP at bind() phase But for now driver need to read edid message in .get_modes() function, so controller must be inited in bind time, so we need to add controller init back. Signed-off-by: Yakir Yang Tested-by: Javier Martinez Canillas --- Changes in v13: None Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: - Call drm_panel_prepare() in .get_modes function, ensure panel should power on before driver try to read edid message. Changes in v3: - Add edid modes parse support Changes in v2: None drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 17 ++++---- drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 46 +++++++++++----------- 2 files changed, 33 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index cfdf695..bc59e8d 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -110,7 +110,7 @@ static unsigned char analogix_dp_calc_edid_check_sum(unsigned char *edid_data) static int analogix_dp_read_edid(struct analogix_dp_device *dp) { - unsigned char edid[EDID_BLOCK_LENGTH * 2]; + unsigned char *edid = dp->edid; unsigned int extend_block = 0; unsigned char sum; unsigned char test_vector; @@ -904,12 +904,6 @@ static void analogix_dp_commit(struct analogix_dp_device *dp) DRM_ERROR("failed to disable the panel\n"); } - ret = analogix_dp_handle_edid(dp); - if (ret) { - dev_err(dp->dev, "unable to handle edid\n"); - return; - } - ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count, dp->video_info.max_link_rate); if (ret) { @@ -939,8 +933,14 @@ static void analogix_dp_commit(struct analogix_dp_device *dp) int analogix_dp_get_modes(struct drm_connector *connector) { struct analogix_dp_device *dp = to_dp(connector); + struct edid *edid = (struct edid *)dp->edid; int num_modes = 0; + if (analogix_dp_handle_edid(dp) == 0) { + drm_mode_connector_update_edid_property(&dp->connector, edid); + num_modes += drm_add_edid_modes(&dp->connector, edid); + } + if (dp->plat_data->panel) num_modes += drm_panel_get_modes(dp->plat_data->panel); @@ -978,6 +978,7 @@ static void analogix_dp_connector_destroy(struct drm_connector *connector) { drm_connector_unregister(connector); drm_connector_cleanup(connector); + } static const struct drm_connector_funcs analogix_dp_connector_funcs = { @@ -1348,6 +1349,8 @@ int analogix_dp_bind(struct device *dev, struct drm_device *drm_dev, } } + analogix_dp_init_dp(dp); + ret = devm_request_irq(&pdev->dev, dp->irq, analogix_dp_irq_handler, irq_flags, "analogix-dp", dp); if (ret) { diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h index a8cba64..40a0759 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h @@ -20,6 +20,28 @@ #define MAX_CR_LOOP 5 #define MAX_EQ_LOOP 5 +/* I2C EDID Chip ID, Slave Address */ +#define I2C_EDID_DEVICE_ADDR 0x50 +#define I2C_E_EDID_DEVICE_ADDR 0x30 + +#define EDID_BLOCK_LENGTH 0x80 +#define EDID_HEADER_PATTERN 0x00 +#define EDID_EXTENSION_FLAG 0x7e +#define EDID_CHECKSUM 0x7f + +/* DP_MAX_LANE_COUNT */ +#define DPCD_ENHANCED_FRAME_CAP(x) (((x) >> 7) & 0x1) +#define DPCD_MAX_LANE_COUNT(x) ((x) & 0x1f) + +/* DP_LANE_COUNT_SET */ +#define DPCD_LANE_COUNT_SET(x) ((x) & 0x1f) + +/* DP_TRAINING_LANE0_SET */ +#define DPCD_PRE_EMPHASIS_SET(x) (((x) & 0x3) << 3) +#define DPCD_PRE_EMPHASIS_GET(x) (((x) >> 3) & 0x3) +#define DPCD_VOLTAGE_SWING_SET(x) (((x) & 0x3) << 0) +#define DPCD_VOLTAGE_SWING_GET(x) (((x) >> 0) & 0x3) + enum link_lane_count_type { LANE_COUNT1 = 1, LANE_COUNT2 = 2, @@ -155,6 +177,7 @@ struct analogix_dp_device { int dpms_mode; int hpd_gpio; bool force_hpd; + unsigned char edid[EDID_BLOCK_LENGTH * 2]; struct analogix_dp_plat_data *plat_data; }; @@ -254,27 +277,4 @@ int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp); void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp); void analogix_dp_enable_scrambling(struct analogix_dp_device *dp); void analogix_dp_disable_scrambling(struct analogix_dp_device *dp); - -/* I2C EDID Chip ID, Slave Address */ -#define I2C_EDID_DEVICE_ADDR 0x50 -#define I2C_E_EDID_DEVICE_ADDR 0x30 - -#define EDID_BLOCK_LENGTH 0x80 -#define EDID_HEADER_PATTERN 0x00 -#define EDID_EXTENSION_FLAG 0x7e -#define EDID_CHECKSUM 0x7f - -/* DP_MAX_LANE_COUNT */ -#define DPCD_ENHANCED_FRAME_CAP(x) (((x) >> 7) & 0x1) -#define DPCD_MAX_LANE_COUNT(x) ((x) & 0x1f) - -/* DP_LANE_COUNT_SET */ -#define DPCD_LANE_COUNT_SET(x) ((x) & 0x1f) - -/* DP_TRAINING_LANE0_SET */ -#define DPCD_PRE_EMPHASIS_SET(x) (((x) & 0x3) << 3) -#define DPCD_PRE_EMPHASIS_GET(x) (((x) >> 3) & 0x3) -#define DPCD_VOLTAGE_SWING_SET(x) (((x) & 0x3) << 0) -#define DPCD_VOLTAGE_SWING_GET(x) (((x) >> 0) & 0x3) - #endif /* _ANALOGIX_DP_CORE_H */