| Message ID | 1453905883-6807-6-git-send-email-m.szyprowski@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
2016? 01? 27? 23:44? Marek Szyprowski ?(?) ? ?: > This patch adds support for blending related properties to Exynos DRM > core and Exynos Mixer CRTC device. To drm-misc. Acked-by : Inki Dae <inki.dae@samsung.com> Thanks, Inki Dae > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > drivers/gpu/drm/exynos/exynos_drm_drv.h | 5 +++ > drivers/gpu/drm/exynos/exynos_drm_plane.c | 60 +++++++++++++++++++++++++++++++ > 2 files changed, 65 insertions(+) > > diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h > index 816537886e4e..b33d69b8bb38 100644 > --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h > +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h > @@ -92,6 +92,9 @@ struct exynos_drm_plane { > #define EXYNOS_DRM_PLANE_CAP_DOUBLE (1 << 0) > #define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1) > #define EXYNOS_DRM_PLANE_CAP_ZPOS (1 << 2) > +#define EXYNOS_DRM_PLANE_CAP_PLANE_ALPHA (1 << 3) > +#define EXYNOS_DRM_PLANE_CAP_PREMULT_ALPHA (1 << 4) > +#define EXYNOS_DRM_PLANE_CAP_BLENDING (1 << 5) > > /* > * Exynos DRM plane configuration structure. > @@ -100,6 +103,7 @@ struct exynos_drm_plane { > * @type: type of the plane (primary, cursor or overlay). > * @pixel_formats: supported pixel formats. > * @num_pixel_formats: number of elements in 'pixel_formats'. > + * @blending_mode: default blending mode. > * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*) > */ > > @@ -108,6 +112,7 @@ struct exynos_drm_plane_config { > enum drm_plane_type type; > const uint32_t *pixel_formats; > unsigned int num_pixel_formats; > + unsigned int blending_mode; > unsigned int capabilities; > }; > > diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c > index 3a486939168e..28502aac135f 100644 > --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c > +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c > @@ -140,6 +140,9 @@ static void exynos_drm_plane_reset(struct drm_plane *plane) > plane->state = &exynos_state->base; > plane->state->plane = plane; > plane->state->zpos = exynos_plane->config->zpos; > + plane->state->alpha = 255; > + plane->state->alpha_premult = 1; > + plane->state->blending = exynos_plane->config->blending_mode; > } > } > > @@ -284,6 +287,53 @@ static void exynos_plane_attach_zpos_property(struct drm_plane *plane, > drm_object_attach_property(&plane->base, prop, zpos); > } > > +static void exynos_plane_attach_alpha_property(struct drm_plane *plane) > +{ > + struct drm_device *dev = plane->dev; > + > + if (!dev->mode_config.alpha_property) > + if (drm_mode_create_alpha_property(dev, 255)) > + return; > + > + drm_object_attach_property(&plane->base, > + dev->mode_config.alpha_property, 255); > +} > + > +static void exynos_plane_attach_alpha_premult_property(struct drm_plane *plane) > +{ > + struct drm_device *dev = plane->dev; > + > + if (!dev->mode_config.alpha_premult_property) > + if (drm_mode_create_alpha_premult_property(dev)) { > + printk("failed to create alpha premult property\n"); > + return; > + } > + > + drm_object_attach_property(&plane->base, > + dev->mode_config.alpha_premult_property, 1); > +} > + > +static void exynos_plane_attach_blending_property(struct drm_plane *plane, > + unsigned int blending_mode) > +{ > + struct drm_device *dev = plane->dev; > + static unsigned int blending_modes[] = { > + DRM_BLEND_DISABLED, > + DRM_BLEND_PIXEL_ALPHA, > + DRM_BLEND_CONST_ALPHA, > + DRM_BLEND_PIXEL_CONST_ALPHA, > + }; > + > + if (!dev->mode_config.blending_property) > + if (drm_mode_create_blending_property(dev, blending_modes, > + ARRAY_SIZE(blending_modes))) > + return; > + > + drm_object_attach_property(&plane->base, > + dev->mode_config.blending_property, > + blending_mode); > +} > + > int exynos_plane_init(struct drm_device *dev, > struct exynos_drm_plane *exynos_plane, > unsigned int index, unsigned long possible_crtcs, > @@ -310,5 +360,15 @@ int exynos_plane_init(struct drm_device *dev, > exynos_plane_attach_zpos_property(&exynos_plane->base, config->zpos, > !(config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS)); > > + if (config->capabilities & EXYNOS_DRM_PLANE_CAP_PLANE_ALPHA) > + exynos_plane_attach_alpha_property(&exynos_plane->base); > + > + if (config->capabilities & EXYNOS_DRM_PLANE_CAP_PREMULT_ALPHA) > + exynos_plane_attach_alpha_premult_property(&exynos_plane->base); > + > + if (config->capabilities & EXYNOS_DRM_PLANE_CAP_BLENDING) > + exynos_plane_attach_blending_property(&exynos_plane->base, > + config->blending_mode); > + > return 0; > } > -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index 816537886e4e..b33d69b8bb38 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h @@ -92,6 +92,9 @@ struct exynos_drm_plane { #define EXYNOS_DRM_PLANE_CAP_DOUBLE (1 << 0) #define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1) #define EXYNOS_DRM_PLANE_CAP_ZPOS (1 << 2) +#define EXYNOS_DRM_PLANE_CAP_PLANE_ALPHA (1 << 3) +#define EXYNOS_DRM_PLANE_CAP_PREMULT_ALPHA (1 << 4) +#define EXYNOS_DRM_PLANE_CAP_BLENDING (1 << 5) /* * Exynos DRM plane configuration structure. @@ -100,6 +103,7 @@ struct exynos_drm_plane { * @type: type of the plane (primary, cursor or overlay). * @pixel_formats: supported pixel formats. * @num_pixel_formats: number of elements in 'pixel_formats'. + * @blending_mode: default blending mode. * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*) */ @@ -108,6 +112,7 @@ struct exynos_drm_plane_config { enum drm_plane_type type; const uint32_t *pixel_formats; unsigned int num_pixel_formats; + unsigned int blending_mode; unsigned int capabilities; }; diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index 3a486939168e..28502aac135f 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c @@ -140,6 +140,9 @@ static void exynos_drm_plane_reset(struct drm_plane *plane) plane->state = &exynos_state->base; plane->state->plane = plane; plane->state->zpos = exynos_plane->config->zpos; + plane->state->alpha = 255; + plane->state->alpha_premult = 1; + plane->state->blending = exynos_plane->config->blending_mode; } } @@ -284,6 +287,53 @@ static void exynos_plane_attach_zpos_property(struct drm_plane *plane, drm_object_attach_property(&plane->base, prop, zpos); } +static void exynos_plane_attach_alpha_property(struct drm_plane *plane) +{ + struct drm_device *dev = plane->dev; + + if (!dev->mode_config.alpha_property) + if (drm_mode_create_alpha_property(dev, 255)) + return; + + drm_object_attach_property(&plane->base, + dev->mode_config.alpha_property, 255); +} + +static void exynos_plane_attach_alpha_premult_property(struct drm_plane *plane) +{ + struct drm_device *dev = plane->dev; + + if (!dev->mode_config.alpha_premult_property) + if (drm_mode_create_alpha_premult_property(dev)) { + printk("failed to create alpha premult property\n"); + return; + } + + drm_object_attach_property(&plane->base, + dev->mode_config.alpha_premult_property, 1); +} + +static void exynos_plane_attach_blending_property(struct drm_plane *plane, + unsigned int blending_mode) +{ + struct drm_device *dev = plane->dev; + static unsigned int blending_modes[] = { + DRM_BLEND_DISABLED, + DRM_BLEND_PIXEL_ALPHA, + DRM_BLEND_CONST_ALPHA, + DRM_BLEND_PIXEL_CONST_ALPHA, + }; + + if (!dev->mode_config.blending_property) + if (drm_mode_create_blending_property(dev, blending_modes, + ARRAY_SIZE(blending_modes))) + return; + + drm_object_attach_property(&plane->base, + dev->mode_config.blending_property, + blending_mode); +} + int exynos_plane_init(struct drm_device *dev, struct exynos_drm_plane *exynos_plane, unsigned int index, unsigned long possible_crtcs, @@ -310,5 +360,15 @@ int exynos_plane_init(struct drm_device *dev, exynos_plane_attach_zpos_property(&exynos_plane->base, config->zpos, !(config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS)); + if (config->capabilities & EXYNOS_DRM_PLANE_CAP_PLANE_ALPHA) + exynos_plane_attach_alpha_property(&exynos_plane->base); + + if (config->capabilities & EXYNOS_DRM_PLANE_CAP_PREMULT_ALPHA) + exynos_plane_attach_alpha_premult_property(&exynos_plane->base); + + if (config->capabilities & EXYNOS_DRM_PLANE_CAP_BLENDING) + exynos_plane_attach_blending_property(&exynos_plane->base, + config->blending_mode); + return 0; }
This patch adds support for blending related properties to Exynos DRM core and Exynos Mixer CRTC device. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> --- drivers/gpu/drm/exynos/exynos_drm_drv.h | 5 +++ drivers/gpu/drm/exynos/exynos_drm_plane.c | 60 +++++++++++++++++++++++++++++++ 2 files changed, 65 insertions(+)