From patchwork Fri Apr 8 04:24:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanwoo Choi X-Patchwork-Id: 8780291 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AF814C0553 for ; Fri, 8 Apr 2016 04:30:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6079220204 for ; Fri, 8 Apr 2016 04:30:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EA4D620274 for ; Fri, 8 Apr 2016 04:30:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757840AbcDHE3V (ORCPT ); Fri, 8 Apr 2016 00:29:21 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:33906 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753609AbcDHEZU (ORCPT ); Fri, 8 Apr 2016 00:25:20 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O5A02N6FSA1A8C0@mailout4.samsung.com>; Fri, 08 Apr 2016 13:25:13 +0900 (KST) Received: from epcpsbgm1new.samsung.com ( [172.20.52.116]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 0D.A1.04781.8A237075; Fri, 8 Apr 2016 13:25:13 +0900 (KST) X-AuditID: cbfee68f-f79c86d0000012ad-c1-570732a882a3 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id AC.A6.06682.8A237075; Fri, 8 Apr 2016 13:25:12 +0900 (KST) Received: from chan.10.32.193.11 ([10.113.62.212]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O5A00DKDS9YHX20@mmp2.samsung.com>; Fri, 08 Apr 2016 13:25:12 +0900 (KST) From: Chanwoo Choi To: myungjoo.ham@samsung.com, kyungmin.park@samsung.com, k.kozlowski@samsung.com, kgene@kernel.org Cc: rjw@rjwysocki.net, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, linux.amoon@gmail.com, m.reichl@fivetechno.de, tjakobi@math.uni-bielefeld.de, inki.dae@samsung.com, cw00.choi@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v8 06/20] PM / devfreq: exynos: Add support of bus frequency of sub-blocks using passive governor Date: Fri, 08 Apr 2016 13:24:55 +0900 Message-id: <1460089509-16260-7-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1460089509-16260-1-git-send-email-cw00.choi@samsung.com> References: <1460089509-16260-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrPIsWRmVeSWpSXmKPExsWyRsSkRHelEXu4wdn/rBbXvzxntZh/5Byr Rf+bhawW516tZLSYdH8Ci8XrF4YW/Y9fM1ucbXrDbrHp8TVWi8u75rBZfO49wmgx4/w+Jot1 G2+xW9y+zGvx8sgPRoul1y8yWdxuXMFmMWH6WhaLM6cvsVq07j3CbtG2+gOrg6jHmnlrGD1a mnvYPC739TJ53LpT77Fz1l12j5XLv7B5bFrVyeaxeUm9x79j7B5brrazePRtWcXo8XmTXABP FJdNSmpOZllqkb5dAlfGh8PT2Qq+RFdc39TI2MC4z7OLkZNDQsBEouX+cmYIW0ziwr31bF2M XBxCAisYJeae/MrYxcgBVrS5UxwiPotR4l7nBRaQBiGBL4wSM36og9hsAloS+1/cYAOxRQRS JB4/PAk2iFngCLPE1I03mEASwgLFEh/m3mAHsVkEVCXOvjzFCGLzCrhKbFrZzw5xhZzEhz2P wGxOATeJyVcmMUMsc5W4sXk6M8hQCYEdHBI3np5hghgkIPFt8iEWiEtlJTYdgPpGUuLgihss ExiFFzAyrGIUTS1ILihOSi8y1itOzC0uzUvXS87P3cQIjNfT/57172C8e8D6EKMAB6MSD++F 92zhQqyJZcWVuYcYTYE2TGSWEk3OByaFvJJ4Q2MzIwtTE1NjI3NLMyVx3oVSP4OFBNITS1Kz U1MLUovii0pzUosPMTJxcEo1MIpfzbPMEv/8jtco2OZO5ZmTys6FYSqp8g5v56Tdq+8urd9p /iXW4gZHKNtO541BWV2HZxQ58TmpXYtTazvGNauhoPW3YNqu+Rdinap0Q3fMLLJbvOwFh8Df jes+Wx8/z1x/XKIyePLD7GgxxyUq+6L+1+id2d7zMcT996nk5cKl5Vsmr5JlUmIpzkg01GIu Kk4EAPdChzrSAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFuphleLIzCtJLcpLzFFi42I5/e+xoO4KI/Zwg3mzTC2uf3nOajH/yDlW i/43C1ktzr1ayWgx6f4EFovXLwwt+h+/ZrY42/SG3WLT42usFpd3zWGz+Nx7hNFixvl9TBbr Nt5it7h9mdfi5ZEfjBZLr19ksrjduILNYsL0tSwWZ05fYrVo3XuE3aJt9QdWB1GPNfPWMHq0 NPeweVzu62XyuHWn3mPnrLvsHiuXf2Hz2LSqk81j85J6j3/H2D22XG1n8ejbsorR4/MmuQCe qAZGm4zUxJTUIoXUvOT8lMy8dFsl7+B453hTMwNDXUNLC3MlhbzE3FRbJRefAF23zBygX5UU yhJzSoFCAYnFxUr6dpgmhIa46VrANEbo+oYEwfUYGaCBhDWMGR8OT2cr+BJdcX1TI2MD4z7P LkYODgkBE4nNneJdjJxAppjEhXvr2boYuTiEBGYxStzrvMACkhAS+MIoMeOHOojNJqAlsf/F DTYQW0QgReLxw5NgDcwCR5glpm68wQSSEBYolvgw9wY7iM0ioCpx9uUpRhCbV8BVYtPKfnaI bXISH/Y8ArM5BdwkJl+ZxAyxzFXixubpzBMYeRcwMqxilEgtSC4oTkrPNcxLLdcrTswtLs1L 10vOz93ECE4Jz6R2MB7c5X6IUYCDUYmH98J7tnAh1sSy4srcQ4wSHMxKIryu+uzhQrwpiZVV qUX58UWlOanFhxhNgQ6byCwlmpwPTFd5JfGGxiZmRpZG5oYWRsbmSuK8j/+vCxMSSE8sSc1O TS1ILYLpY+LglGpgDNKZX3X90usT51Q9J23eylvnlfbsuNFj9Z/3wzd63/0h7bi9eE3f9YvL dlQYen7eHf70ZV/Dy4+uoqGnitoE5O0POsc1OOUnC1TO2y2mH3fm3cFtpamrF1b+v3Vvmp3B 3Ky14uceTzwVUnk0OjCuIbP2Y58WQ/Ge7Uk5ChF3ePa8kHl+SSaCQYmlOCPRUIu5qDgRALSj 4rEfAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the support of bus frequency feature for sub-blocks which share the one power line. If each bus depends on the power line, each bus is not able to change the voltage by oneself. To optimize the power-consumption on runtime, some buses using the same power line should change the source clock and regulator at the same time. So, this patch uses the passive governor to support the bus frequency for all buses which sharing the one power line. For example, Exynos3250 include the two power line for AXI buses as following: : VDD_MIF : MIF (Memory Interface) provide the DMC (Dynamic Memory Controller) with the power (regulator). : VDD_INT : INT (Internal) provide the various sub-blocks with the power (regulator). Each bus is included in as follwoing block. In the case of VDD_MIF, only DMC bus use the power line. So, there is no any depencency between buese. But, in the case of VDD_INT, various buses share the one power line of VDD_INT. We need to make the depenency between buses. When using passive governor, there is no problem to support the bus frequency as DVFS for all buses. One bus should be operated as the parent bus device which gathering the current load of INT block and then decides the new frequency with some governors except of passive governor. After deciding the new frequency by the parent bus device, the rest bus devices will change the each source clock according to new frequency of the parent bus device. - MIF (Memory Interface) block : VDD_MIF |--- DMC - INT (Internal) block : VDD_INT |--- LEFTBUS (parent) |--- PERIL |--- MFC |--- G3D |--- RIGHTBUS |--- FSYS |--- LCD0 |--- PERIR |--- ISP |--- CAM Signed-off-by: Chanwoo Choi [tjakobi: Reported debugfs error during booting and cw00.choi fix it.] Reported-by: Tobias Jakobi Signed-off-by: MyungJoo Ham --- drivers/devfreq/Kconfig | 1 + drivers/devfreq/exynos-bus.c | 219 ++++++++++++++++++++++++++++++++++--------- 2 files changed, 174 insertions(+), 46 deletions(-) diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig index d260cd0219f6..30e1daf1c827 100644 --- a/drivers/devfreq/Kconfig +++ b/drivers/devfreq/Kconfig @@ -78,6 +78,7 @@ config ARM_EXYNOS_BUS_DEVFREQ bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver" depends on ARCH_EXYNOS select DEVFREQ_GOV_SIMPLE_ONDEMAND + select DEVFREQ_GOV_PASSIVE select DEVFREQ_EVENT_EXYNOS_PPMU select PM_DEVFREQ_EVENT select PM_OPP diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c index 137de6196af3..50fe1a16c574 100644 --- a/drivers/devfreq/exynos-bus.c +++ b/drivers/devfreq/exynos-bus.c @@ -1,7 +1,7 @@ /* * Generic Exynos Bus frequency driver with DEVFREQ Framework * - * Copyright (c) 2015 Samsung Electronics Co., Ltd. + * Copyright (c) 2016 Samsung Electronics Co., Ltd. * Author : Chanwoo Choi * * This driver support Exynos Bus frequency feature by using @@ -93,7 +93,7 @@ static int exynos_bus_get_event(struct exynos_bus *bus, } /* - * Must necessary function for devfreq governor + * Must necessary function for devfreq simple-ondemand governor */ static int exynos_bus_target(struct device *dev, unsigned long *freq, u32 flags) { @@ -202,59 +202,81 @@ static void exynos_bus_exit(struct device *dev) regulator_disable(bus->regulator); dev_pm_opp_of_remove_table(dev); + clk_disable_unprepare(bus->clk); } -static int exynos_bus_parse_of(struct device_node *np, - struct exynos_bus *bus) +/* + * Must necessary function for devfreq passive governor + */ +static int exynos_bus_passive_target(struct device *dev, unsigned long *freq, + u32 flags) { - struct device *dev = bus->dev; - unsigned long rate; - int i, ret, count, size; + struct exynos_bus *bus = dev_get_drvdata(dev); + struct dev_pm_opp *new_opp; + unsigned long old_freq, new_freq; + int ret = 0; - /* Get the clock to provide each bus with source clock */ - bus->clk = devm_clk_get(dev, "bus"); - if (IS_ERR(bus->clk)) { - dev_err(dev, "failed to get bus clock\n"); - return PTR_ERR(bus->clk); + /* Get new opp-bus instance according to new bus clock */ + rcu_read_lock(); + new_opp = devfreq_recommended_opp(dev, freq, flags); + if (IS_ERR(new_opp)) { + dev_err(dev, "failed to get recommended opp instance\n"); + rcu_read_unlock(); + return PTR_ERR(new_opp); } - ret = clk_prepare_enable(bus->clk); - if (ret < 0) { - dev_err(dev, "failed to get enable clock\n"); - return ret; - } + new_freq = dev_pm_opp_get_freq(new_opp); + old_freq = dev_pm_opp_get_freq(bus->curr_opp); + rcu_read_unlock(); - /* Get the freq/voltage OPP table to scale the bus frequency */ - rcu_read_lock(); - ret = dev_pm_opp_of_add_table(dev); + if (old_freq == new_freq) + return 0; + + /* Change the frequency according to new OPP level */ + mutex_lock(&bus->lock); + + ret = clk_set_rate(bus->clk, new_freq); if (ret < 0) { - dev_err(dev, "failed to get OPP table\n"); - rcu_read_unlock(); - goto err_clk; + dev_err(dev, "failed to set the clock of bus\n"); + goto out; } - rate = clk_get_rate(bus->clk); - bus->curr_opp = dev_pm_opp_find_freq_ceil(dev, &rate); - if (IS_ERR(bus->curr_opp)) { - dev_err(dev, "failed to find dev_pm_opp\n"); - rcu_read_unlock(); - ret = PTR_ERR(bus->curr_opp); - goto err_opp; - } - rcu_read_unlock(); + *freq = new_freq; + bus->curr_opp = new_opp; + + dev_dbg(dev, "Set the frequency of bus (%lukHz -> %lukHz)\n", + old_freq/1000, new_freq/1000); +out: + mutex_unlock(&bus->lock); + + return ret; +} + +static void exynos_bus_passive_exit(struct device *dev) +{ + struct exynos_bus *bus = dev_get_drvdata(dev); + + dev_pm_opp_of_remove_table(dev); + clk_disable_unprepare(bus->clk); +} + +static int exynos_bus_parent_parse_of(struct device_node *np, + struct exynos_bus *bus) +{ + struct device *dev = bus->dev; + int i, ret, count, size; /* Get the regulator to provide each bus with the power */ bus->regulator = devm_regulator_get(dev, "vdd"); if (IS_ERR(bus->regulator)) { dev_err(dev, "failed to get VDD regulator\n"); - ret = PTR_ERR(bus->regulator); - goto err_opp; + return PTR_ERR(bus->regulator); } ret = regulator_enable(bus->regulator); if (ret < 0) { dev_err(dev, "failed to enable VDD regulator\n"); - goto err_opp; + return ret; } /* @@ -305,6 +327,51 @@ static int exynos_bus_parse_of(struct device_node *np, err_regulator: regulator_disable(bus->regulator); + + return ret; +} + +static int exynos_bus_parse_of(struct device_node *np, + struct exynos_bus *bus) +{ + struct device *dev = bus->dev; + unsigned long rate; + int ret; + + /* Get the clock to provide each bus with source clock */ + bus->clk = devm_clk_get(dev, "bus"); + if (IS_ERR(bus->clk)) { + dev_err(dev, "failed to get bus clock\n"); + return PTR_ERR(bus->clk); + } + + ret = clk_prepare_enable(bus->clk); + if (ret < 0) { + dev_err(dev, "failed to get enable clock\n"); + return ret; + } + + /* Get the freq and voltage from OPP table to scale the bus freq */ + rcu_read_lock(); + ret = dev_pm_opp_of_add_table(dev); + if (ret < 0) { + dev_err(dev, "failed to get OPP table\n"); + rcu_read_unlock(); + goto err_clk; + } + + rate = clk_get_rate(bus->clk); + bus->curr_opp = devfreq_recommended_opp(dev, &rate, 0); + if (IS_ERR(bus->curr_opp)) { + dev_err(dev, "failed to find dev_pm_opp\n"); + rcu_read_unlock(); + ret = PTR_ERR(bus->curr_opp); + goto err_opp; + } + rcu_read_unlock(); + + return 0; + err_opp: dev_pm_opp_of_remove_table(dev); err_clk: @@ -319,8 +386,11 @@ static int exynos_bus_probe(struct platform_device *pdev) struct device_node *np = dev->of_node; struct devfreq_dev_profile *profile; struct devfreq_simple_ondemand_data *ondemand_data; + struct devfreq_passive_data *passive_data; + struct devfreq *parent_devfreq; struct exynos_bus *bus; - int ret; + int ret, max_state; + unsigned long min_freq, max_freq; if (!np) { dev_err(dev, "failed to find devicetree node\n"); @@ -337,20 +407,33 @@ static int exynos_bus_probe(struct platform_device *pdev) /* Parse the device-tree to get the resource information */ ret = exynos_bus_parse_of(np, bus); if (ret < 0) - return ret; + goto err; - /* Initalize the struct profile and governor data */ profile = devm_kzalloc(dev, sizeof(*profile), GFP_KERNEL); - if (!profile) - return -ENOMEM; + if (!profile) { + ret = -ENOMEM; + goto err; + } + + if (of_parse_phandle(dev->of_node, "devfreq", 0)) + goto passive; + else + ret = exynos_bus_parent_parse_of(np, bus); + + if (ret < 0) + goto err; + + /* Initalize the struct profile and governor data for parent device */ profile->polling_ms = 50; profile->target = exynos_bus_target; profile->get_dev_status = exynos_bus_get_dev_status; profile->exit = exynos_bus_exit; ondemand_data = devm_kzalloc(dev, sizeof(*ondemand_data), GFP_KERNEL); - if (!ondemand_data) - return -ENOMEM; + if (!ondemand_data) { + ret = -ENOMEM; + goto err; + } ondemand_data->upthreshold = 40; ondemand_data->downdifferential = 5; @@ -359,14 +442,15 @@ static int exynos_bus_probe(struct platform_device *pdev) ondemand_data); if (IS_ERR(bus->devfreq)) { dev_err(dev, "failed to add devfreq device\n"); - return PTR_ERR(bus->devfreq); + ret = PTR_ERR(bus->devfreq); + goto err; } /* Register opp_notifier to catch the change of OPP */ ret = devm_devfreq_register_opp_notifier(dev, bus->devfreq); if (ret < 0) { dev_err(dev, "failed to register opp notifier\n"); - return ret; + goto err; } /* @@ -376,16 +460,59 @@ static int exynos_bus_probe(struct platform_device *pdev) ret = exynos_bus_enable_edev(bus); if (ret < 0) { dev_err(dev, "failed to enable devfreq-event devices\n"); - return ret; + goto err; } ret = exynos_bus_set_event(bus); if (ret < 0) { dev_err(dev, "failed to set event to devfreq-event devices\n"); - return ret; + goto err; } + goto out; +passive: + /* Initalize the struct profile and governor data for passive device */ + profile->target = exynos_bus_passive_target; + profile->exit = exynos_bus_passive_exit; + + /* Get the instance of parent devfreq device */ + parent_devfreq = devfreq_get_devfreq_by_phandle(dev, 0); + if (IS_ERR(parent_devfreq)) { + ret = -EPROBE_DEFER; + goto err; + } + + passive_data = devm_kzalloc(dev, sizeof(*passive_data), GFP_KERNEL); + if (!passive_data) { + ret = -ENOMEM; + goto err; + } + passive_data->parent = parent_devfreq; + + /* Add devfreq device for exynos bus with passive governor */ + bus->devfreq = devm_devfreq_add_device(dev, profile, "passive", + passive_data); + if (IS_ERR(bus->devfreq)) { + dev_err(dev, + "failed to add devfreq dev with passive governor\n"); + ret = -EPROBE_DEFER; + goto err; + } + +out: + max_state = bus->devfreq->profile->max_state; + min_freq = (bus->devfreq->profile->freq_table[0] / 1000); + max_freq = (bus->devfreq->profile->freq_table[max_state - 1] / 1000); + pr_info("exynos-bus: new bus device registered: %s (%6ld KHz ~ %6ld KHz)\n", + dev_name(dev), min_freq, max_freq); + return 0; + +err: + dev_pm_opp_of_remove_table(dev); + clk_disable_unprepare(bus->clk); + + return ret; } #ifdef CONFIG_PM_SLEEP