From patchwork Mon May 9 06:19:49 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9041161 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7E6069F1C3 for ; Mon, 9 May 2016 06:20:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 60A3020145 for ; Mon, 9 May 2016 06:20:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 338AD2011E for ; Mon, 9 May 2016 06:20:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751167AbcEIGUG (ORCPT ); Mon, 9 May 2016 02:20:06 -0400 Received: from mailout4.w1.samsung.com ([210.118.77.14]:57846 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751010AbcEIGUE (ORCPT ); Mon, 9 May 2016 02:20:04 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O6W00DAAC9DY220@mailout4.w1.samsung.com>; Mon, 09 May 2016 07:20:01 +0100 (BST) X-AuditID: cbfec7f5-f792a6d000001302-ca-57302c101a63 Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 4F.DF.04866.01C20375; Mon, 9 May 2016 07:20:00 +0100 (BST) Received: from AMDC2174.DIGITAL.local ([106.120.53.17]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O6W003RKC99P120@eusync4.samsung.com>; Mon, 09 May 2016 07:20:00 +0100 (BST) From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Lukasz Majewski , Anand Moon , Javier Martinez Canillas , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Bartlomiej Zolnierkiewicz Subject: [PATCH] ARM: dts: exynos: Only Odroid XU3-family boards use DTSI with CPU thermal nodes Date: Mon, 09 May 2016 08:19:49 +0200 Message-id: <1462774789-15360-1-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupjluLIzCtJLcpLzFFi42I5/e/4NV0BHYNwg4+TTC02zljPajH/yDlW izdv1zBZvH5haNH/+DWzxZuHmxktNj2+xmpxedccNosZ5/cxWazbeIvdgctj56y77B6bVnWy eWxeUu+xpR/I69uyitHj8ya5ALYoLpuU1JzMstQifbsErowtmyayFxyzqJhwq4+1gfGYRhcj J4eEgInEokmXGSFsMYkL99azdTFycQgJLGWUeLvtATNIQkigkUnicIM/iM0mYCyxefkSsCIR gXtMEsdfbGEDSTALWEhs3bqaHcQWFkiSmN3WyApiswioStz+PhVsEK+Au8TB+YvYILbJSZw8 Npl1AiP3AkaGVYyiqaXJBcVJ6blGesWJucWleel6yfm5mxghofR1B+PSY1aHGAU4GJV4eBku 64cLsSaWFVfmHmKU4GBWEuF9JWsQLsSbklhZlVqUH19UmpNafIhRmoNFSZx35q73IUIC6Ykl qdmpqQWpRTBZJg5OqQbGxPyj2+b85I9/I1XX5iNp9bbCyVn6Yglj4InOmx2NCT6Fx65Hte0U fyZYYZbXU3uKvzNlc3ih3IaMf3wOrXXPdnomGLz9daMn53Zn0Jo34cdbAuszdkkU9oas+i/V VO//l+PWq4WnCrZof1zpvPXN7OJclwf6UTcX1P29E1KofLtNN20Ds5ESS3FGoqEWc1FxIgBm X5QDIQIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Include the CPU thermal nodes directly in Odroid XU3-family common DTS because it is the only user of it. Keeping it in separate DTSI node does not bring benefits because: 1. It is not re-usable on other non-fan boards (fan is referenced), 2. It won't be re-used on future Odroid XU board because different CPU cluster behavior. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Tested-by: Anand Moon --- arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi | 103 --------------------- arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 94 ++++++++++++++++++- 2 files changed, 92 insertions(+), 105 deletions(-) delete mode 100644 arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi diff --git a/arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi b/arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi deleted file mode 100644 index 3e4c4ad96d63..000000000000 --- a/arch/arm/boot/dts/exynos5422-cpu-thermal.dtsi +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Device tree sources for Exynos5422 thermal zone - * - * Copyright (c) 2015 Lukasz Majewski - * Anand Moon - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include - -/ { - thermal-zones { - cpu0_thermal: cpu0-thermal { - thermal-sensors = <&tmu_cpu0 0>; - polling-delay-passive = <250>; - polling-delay = <0>; - trips { - cpu_alert0: cpu-alert-0 { - temperature = <50000>; /* millicelsius */ - hysteresis = <5000>; /* millicelsius */ - type = "active"; - }; - cpu_alert1: cpu-alert-1 { - temperature = <60000>; /* millicelsius */ - hysteresis = <5000>; /* millicelsius */ - type = "active"; - }; - cpu_alert2: cpu-alert-2 { - temperature = <70000>; /* millicelsius */ - hysteresis = <5000>; /* millicelsius */ - type = "active"; - }; - cpu_crit0: cpu-crit-0 { - temperature = <120000>; /* millicelsius */ - hysteresis = <0>; /* millicelsius */ - type = "critical"; - }; - /* - * Exyunos542x support only 4 trip-points - * so for these polling mode is required. - * Start polling at temperature level of last - * interrupt-driven trip: cpu_alert2 - */ - cpu_alert3: cpu-alert-3 { - temperature = <70000>; /* millicelsius */ - hysteresis = <10000>; /* millicelsius */ - type = "passive"; - }; - cpu_alert4: cpu-alert-4 { - temperature = <85000>; /* millicelsius */ - hysteresis = <10000>; /* millicelsius */ - type = "passive"; - }; - - }; - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = <&fan0 0 1>; - }; - map1 { - trip = <&cpu_alert1>; - cooling-device = <&fan0 1 2>; - }; - map2 { - trip = <&cpu_alert2>; - cooling-device = <&fan0 2 3>; - }; - /* - * When reaching cpu_alert3, reduce CPU - * by 2 steps. On Exynos5422/5800 that would - * be: 1500 MHz and 1100 MHz. - */ - map3 { - trip = <&cpu_alert3>; - cooling-device = <&cpu0 0 2>; - }; - map4 { - trip = <&cpu_alert3>; - cooling-device = <&cpu4 0 2>; - }; - - /* - * When reaching cpu_alert4, reduce CPU - * further, down to 600 MHz (11 steps for big, - * 7 steps for LITTLE). - */ - map5 { - trip = <&cpu_alert4>; - cooling-device = <&cpu0 3 7>; - }; - map6 { - trip = <&cpu_alert4>; - cooling-device = <&cpu4 3 11>; - }; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 2a4e10bc8801..ff05041835e5 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -1,9 +1,11 @@ /* * Hardkernel Odroid XU3 board device tree source * - * Copyright (c) 2014 Collabora Ltd. * Copyright (c) 2013 Samsung Electronics Co., Ltd. * http://www.samsung.com + * Copyright (c) 2014 Collabora Ltd. + * Copyright (c) 2015 Lukasz Majewski + * Anand Moon * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -16,7 +18,6 @@ #include #include "exynos5800.dtsi" #include "exynos5422-cpus.dtsi" -#include "exynos5422-cpu-thermal.dtsi" / { memory { @@ -54,6 +55,95 @@ #cooling-cells = <2>; cooling-levels = <0 130 170 230>; }; + + thermal-zones { + cpu0_thermal: cpu0-thermal { + thermal-sensors = <&tmu_cpu0 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu_alert0: cpu-alert-0 { + temperature = <50000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "active"; + }; + cpu_alert1: cpu-alert-1 { + temperature = <60000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "active"; + }; + cpu_alert2: cpu-alert-2 { + temperature = <70000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "active"; + }; + cpu_crit0: cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + /* + * Exynos542x supports only 4 trip-points + * so for these polling mode is required. + * Start polling at temperature level of last + * interrupt-driven trip: cpu_alert2 + */ + cpu_alert3: cpu-alert-3 { + temperature = <70000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + cpu_alert4: cpu-alert-4 { + temperature = <85000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + + }; + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&fan0 0 1>; + }; + map1 { + trip = <&cpu_alert1>; + cooling-device = <&fan0 1 2>; + }; + map2 { + trip = <&cpu_alert2>; + cooling-device = <&fan0 2 3>; + }; + /* + * When reaching cpu_alert3, reduce CPU + * by 2 steps. On Exynos5422/5800 that would + * be: 1500 MHz and 1100 MHz. + */ + map3 { + trip = <&cpu_alert3>; + cooling-device = <&cpu0 0 2>; + }; + map4 { + trip = <&cpu_alert3>; + cooling-device = <&cpu4 0 2>; + }; + + /* + * When reaching cpu_alert4, reduce CPU + * further, down to 600 MHz (11 steps for big, + * 7 steps for LITTLE). + */ + map5 { + trip = <&cpu_alert4>; + cooling-device = <&cpu0 3 7>; + }; + map6 { + trip = <&cpu_alert4>; + cooling-device = <&cpu4 3 11>; + }; + }; + }; + }; + }; &bus_wcore {