From patchwork Sat May 28 09:54:31 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9139253 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E662560759 for ; Sat, 28 May 2016 09:56:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D3E44252D5 for ; Sat, 28 May 2016 09:56:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C6F7127F17; Sat, 28 May 2016 09:56:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 64F80252D5 for ; Sat, 28 May 2016 09:56:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754474AbcE1J43 (ORCPT ); Sat, 28 May 2016 05:56:29 -0400 Received: from mail.kernel.org ([198.145.29.136]:39977 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755293AbcE1J41 (ORCPT ); Sat, 28 May 2016 05:56:27 -0400 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 25F7D20379; Sat, 28 May 2016 09:56:21 +0000 (UTC) Received: from localhost.localdomain (89-66-181-234.dynamic.chello.pl [89.66.181.234]) (using TLSv1.2 with cipher AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 424E42035E; Sat, 28 May 2016 09:56:17 +0000 (UTC) From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Sylwester Nawrocki , Tomasz Figa , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Javier Martinez Canillas , Rob Herring , Krzysztof Kozlowski Subject: [PATCH v5 20/22] ARM: dts: exynos: Move HSI2C nodes to exynos54xx.dtsi Date: Sat, 28 May 2016 11:54:31 +0200 Message-Id: <1464429273-23457-21-git-send-email-krzk@kernel.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1464429273-23457-1-git-send-email-krzk@kernel.org> References: <1464429273-23457-1-git-send-email-krzk@kernel.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The USI/HSI2C nodes can be mostly shared between Exynos5420 and Exynos5410 so move them to common DTSI. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas --- Change since v4: 1. Remove the nodes in exynos5420.dtsi (before they were actually just copied instead of moving). 2. Use lower-case for hex. --- arch/arm/boot/dts/exynos5420.dtsi | 85 +++++++++++++-------------------------- arch/arm/boot/dts/exynos54xx.dtsi | 41 +++++++++++++++++++ 2 files changed, 69 insertions(+), 57 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 8fa65eb8027d..8b1e706e9250 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -29,10 +29,6 @@ pinctrl2 = &pinctrl_2; pinctrl3 = &pinctrl_3; pinctrl4 = &pinctrl_4; - i2c4 = &hsi2c_4; - i2c5 = &hsi2c_5; - i2c6 = &hsi2c_6; - i2c7 = &hsi2c_7; i2c8 = &hsi2c_8; i2c9 = &hsi2c_9; i2c10 = &hsi2c_10; @@ -526,59 +522,6 @@ status = "disabled"; }; - /* i2c_0-3 are defined in exynos5.dtsi */ - hsi2c_4: i2c@12CA0000 { - compatible = "samsung,exynos5250-hsi2c"; - reg = <0x12CA0000 0x1000>; - interrupts = <0 60 0>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c4_hs_bus>; - clocks = <&clock CLK_USI0>; - clock-names = "hsi2c"; - status = "disabled"; - }; - - hsi2c_5: i2c@12CB0000 { - compatible = "samsung,exynos5250-hsi2c"; - reg = <0x12CB0000 0x1000>; - interrupts = <0 61 0>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c5_hs_bus>; - clocks = <&clock CLK_USI1>; - clock-names = "hsi2c"; - status = "disabled"; - }; - - hsi2c_6: i2c@12CC0000 { - compatible = "samsung,exynos5250-hsi2c"; - reg = <0x12CC0000 0x1000>; - interrupts = <0 62 0>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6_hs_bus>; - clocks = <&clock CLK_USI2>; - clock-names = "hsi2c"; - status = "disabled"; - }; - - hsi2c_7: i2c@12CD0000 { - compatible = "samsung,exynos5250-hsi2c"; - reg = <0x12CD0000 0x1000>; - interrupts = <0 63 0>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c7_hs_bus>; - clocks = <&clock CLK_USI3>; - clock-names = "hsi2c"; - status = "disabled"; - }; - hsi2c_8: i2c@12E00000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12E00000 0x1000>; @@ -1022,6 +965,34 @@ pinctrl-0 = <&i2c3_bus>; }; +&hsi2c_4 { + clocks = <&clock CLK_USI0>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_hs_bus>; +}; + +&hsi2c_5 { + clocks = <&clock CLK_USI1>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_hs_bus>; +}; + +&hsi2c_6 { + clocks = <&clock CLK_USI2>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_hs_bus>; +}; + +&hsi2c_7 { + clocks = <&clock CLK_USI3>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_hs_bus>; +}; + &mct { clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index e01d068d4c38..44a8391c8524 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -21,6 +21,10 @@ compatible = "samsung,exynos5"; aliases { + i2c4 = &hsi2c_4; + i2c5 = &hsi2c_5; + i2c6 = &hsi2c_6; + i2c7 = &hsi2c_7; usbdrdphy0 = &usbdrd_phy0; usbdrdphy1 = &usbdrd_phy1; }; @@ -70,6 +74,43 @@ }; }; + /* i2c_0-3 are defined in exynos5.dtsi */ + hsi2c_4: i2c@12ca0000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12ca0000 0x1000>; + interrupts = <0 60 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_5: i2c@12cb0000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12cb0000 0x1000>; + interrupts = <0 61 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_6: i2c@12cc0000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12cc0000 0x1000>; + interrupts = <0 62 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_7: i2c@12cd0000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12cd0000 0x1000>; + interrupts = <0 63 0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + usbdrd3_0: usb3-0 { compatible = "samsung,exynos5250-dwusb3"; #address-cells = <1>;