From patchwork Wed Aug 31 12:13:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9307101 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 095E7601C0 for ; Wed, 31 Aug 2016 12:18:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EEE9128F1A for ; Wed, 31 Aug 2016 12:18:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E356A28F1C; Wed, 31 Aug 2016 12:18:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1B7DC28F1A for ; Wed, 31 Aug 2016 12:18:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760374AbcHaMR5 (ORCPT ); Wed, 31 Aug 2016 08:17:57 -0400 Received: from mailout3.w1.samsung.com ([210.118.77.13]:36266 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759571AbcHaMN5 (ORCPT ); Wed, 31 Aug 2016 08:13:57 -0400 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OCR00GVYWMS73B0@mailout3.w1.samsung.com>; Wed, 31 Aug 2016 13:13:40 +0100 (BST) X-AuditID: cbfec7f4-f79cb6d000001359-7b-57c6c9f46cbd Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id CF.58.04953.4F9C6C75; Wed, 31 Aug 2016 13:13:40 +0100 (BST) Received: from AMDC2174.DIGITAL.local ([106.120.53.17]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OCR000W8WMOWY00@eusync3.samsung.com>; Wed, 31 Aug 2016 13:13:40 +0100 (BST) From: Krzysztof Kozlowski To: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Javier Martinez Canillas , Tomasz Figa , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 1/9] ARM: dts: exynos: Add macros for GPIO configuration Date: Wed, 31 Aug 2016 14:13:25 +0200 Message-id: <1472645613-5362-2-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1472645613-5362-1-git-send-email-k.kozlowski@samsung.com> References: <1472645613-5362-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNLMWRmVeSWpSXmKPExsVy+t/xq7pfTh4LN1i3RNFi44z1rBbzj5xj tXjzdg2TxesXhhb9j18zW5w/v4HdYtPja6wWl3fNYbOYcX4fk8XS6xeZLFr3HmG3OPymndVi 1a4/jA68HmvmrWH02DnrLrvHplWdbB6bl9R7bOkH8vq2rGL0+LxJLoA9issmJTUnsyy1SN8u gSvjyvMO9oKjJhULl3xgbGB8rd3FyMkhIWAisXXZOjYIW0ziwr31YLaQwFJGiQdvPLoYuYDs RiaJK5emM4Ik2ASMJTYvX8IGkhARmMEkcXXZOxYQh1ngC6PEqSmPmUCqhAU8JG6fmcEOYrMI qEpsmr6AFcTmFXCTWNN2mxVinZzEyWOTwWxOAXeJt0+XMkGsdpM4uesGywRG3gWMDKsYRVNL kwuKk9JzDfWKE3OLS/PS9ZLzczcxQoL0yw7GxcesDjEKcDAq8fBmzDgaLsSaWFZcmXuIUYKD WUmEd/aJY+FCvCmJlVWpRfnxRaU5qcWHGKU5WJTEeefueh8iJJCeWJKanZpakFoEk2Xi4JRq YAy5eYzx45K9sy8omYmwHe1T+39s9QKu0JVG10s91j/xrOYvDlL+evA7X3xZhFdh4M/9W259 +jtZoD7wdkK80vRywXUtXXrOUd0HHiVeDc3T03m2qW/WGc8Ll8y/f1m/b7ZA2bOdc6fU+99e 6Tupx+yoxWxZhZVSDCf3Rq3Yseh28KFfU6K9djxRYinOSDTUYi4qTgQAKs+jkE4CAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add macros for replacing hard-coded GPIO configuration: pull up/down, drive strength and function. Although PIN_FUNC_SPC_2 does not bring much information about the function itself, it still is more descriptive then hard-coded number <2>. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 5 +++++ arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/exynos4415-pinctrl.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 13 +++++++++++++ arch/arm/boot/dts/exynos5250-pinctrl.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/exynos5260-pinctrl.dtsi | 17 ++++++++++++++--- arch/arm/boot/dts/exynos5410-pinctrl.dtsi | 16 ++++++++++++++++ arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 17 +++++++++++++++++ 8 files changed, 116 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index 40ea7de44933..645bc3669554 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -26,6 +26,11 @@ #define PIN_PDN_INPUT 2 #define PIN_PDN_PREV 3 +#define PIN_FUNC_INPUT 0 +#define PIN_FUNC_SPC_2 2 +#define PIN_FUNC_SPC_3 3 +#define PIN_FUNC_SPC_4 4 + #define PIN_IN(_pin, _pull, _drv) \ _pin { \ samsung,pins = #_pin; \ diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 9331c6252eff..21129263e4e5 100644 --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi @@ -14,6 +14,23 @@ * published by the Free Software Foundation. */ +#define PIN_PULL_NONE 0 +#define PIN_PULL_DOWN 1 +#define PIN_PULL_UP 3 + +#define PIN_DRV_LV1 0 +#define PIN_DRV_LV2 2 +#define PIN_DRV_LV3 1 +#define PIN_DRV_LV4 3 + +#define PIN_FUNC_INPUT 0 +#define PIN_FUNC_OUTPUT 1 +#define PIN_FUNC_SPC_2 2 +#define PIN_FUNC_SPC_3 3 +#define PIN_FUNC_SPC_4 4 +#define PIN_FUNC_SPC_5 5 +#define PIN_FUNC_SPC_F 0xf + / { pinctrl@11400000 { gpa0: gpa0 { diff --git a/arch/arm/boot/dts/exynos4415-pinctrl.dtsi b/arch/arm/boot/dts/exynos4415-pinctrl.dtsi index 75af9c56123e..ae9d140a24d1 100644 --- a/arch/arm/boot/dts/exynos4415-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4415-pinctrl.dtsi @@ -11,6 +11,23 @@ * published by the Free Software Foundation. */ +#define PIN_PULL_NONE 0 +#define PIN_PULL_DOWN 1 +#define PIN_PULL_UP 3 + +#define PIN_DRV_LV1 0 +#define PIN_DRV_LV2 2 +#define PIN_DRV_LV3 1 +#define PIN_DRV_LV4 3 + +#define PIN_FUNC_INPUT 0 +#define PIN_FUNC_OUTPUT 1 +#define PIN_FUNC_SPC_2 2 +#define PIN_FUNC_SPC_3 3 +#define PIN_FUNC_SPC_4 4 +#define PIN_FUNC_SPC_5 5 +#define PIN_FUNC_SPC_F 0xf + &pinctrl_0 { gpa0: gpa0 { gpio-controller; diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi index 856b29254374..ba5865208d3e 100644 --- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi @@ -16,11 +16,24 @@ #define PIN_PULL_DOWN 1 #define PIN_PULL_UP 3 +#define PIN_DRV_LV1 0 +#define PIN_DRV_LV2 2 +#define PIN_DRV_LV3 1 +#define PIN_DRV_LV4 3 + #define PIN_PDN_OUT0 0 #define PIN_PDN_OUT1 1 #define PIN_PDN_INPUT 2 #define PIN_PDN_PREV 3 +#define PIN_FUNC_INPUT 0 +#define PIN_FUNC_OUTPUT 1 +#define PIN_FUNC_SPC_2 2 +#define PIN_FUNC_SPC_3 3 +#define PIN_FUNC_SPC_4 4 +#define PIN_FUNC_SPC_5 5 +#define PIN_FUNC_SPC_F 0xf + #define PIN_SLP(_pin, _mode, _pull) \ _pin { \ samsung,pins = #_pin; \ diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi index 880917e508b2..5563dd80d4d0 100644 --- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi @@ -12,6 +12,23 @@ * published by the Free Software Foundation. */ +#define PIN_PULL_NONE 0 +#define PIN_PULL_DOWN 1 +#define PIN_PULL_UP 3 + +#define PIN_DRV_LV1 0 +#define PIN_DRV_LV2 2 +#define PIN_DRV_LV3 1 +#define PIN_DRV_LV4 3 + +#define PIN_FUNC_INPUT 0 +#define PIN_FUNC_OUTPUT 1 +#define PIN_FUNC_SPC_2 2 +#define PIN_FUNC_SPC_3 3 +#define PIN_FUNC_SPC_4 4 +#define PIN_FUNC_SPC_5 5 +#define PIN_FUNC_SPC_F 0xf + &pinctrl_0 { gpa0: gpa0 { gpio-controller; diff --git a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi index f6ee55ea0708..efd01b816538 100644 --- a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi @@ -12,9 +12,20 @@ * published by the Free Software Foundation. */ -#define PIN_PULL_NONE 0 -#define PIN_PULL_DOWN 1 -#define PIN_PULL_UP 3 +#define PIN_PULL_NONE 0 +#define PIN_PULL_DOWN 1 +#define PIN_PULL_UP 3 + +#define PIN_DRV_LV1 0 +#define PIN_DRV_LV2 1 +#define PIN_DRV_LV4 2 +#define PIN_DRV_LV6 3 + +#define PIN_FUNC_INPUT 0 +#define PIN_FUNC_OUTPUT 1 +#define PIN_FUNC_SPC_2 2 +#define PIN_FUNC_SPC_3 3 +#define PIN_FUNC_SPC_4 4 &pinctrl_0 { gpa0: gpa0 { diff --git a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi index b58a0f29f42c..10272fa54c37 100644 --- a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi @@ -9,6 +9,22 @@ * published by the Free Software Foundation. */ +#define PIN_PULL_NONE 0 +#define PIN_PULL_DOWN 1 +#define PIN_PULL_UP 3 + +#define PIN_DRV_LV1 0 +#define PIN_DRV_LV2 1 +#define PIN_DRV_LV3 2 +#define PIN_DRV_LV4 3 + +#define PIN_FUNC_INPUT 0 +#define PIN_FUNC_OUTPUT 1 +#define PIN_FUNC_SPC_2 2 +#define PIN_FUNC_SPC_3 3 +#define PIN_FUNC_SPC_4 4 +#define PIN_FUNC_SPC_F 0xf + &pinctrl_0 { gpa0: gpa0 { gpio-controller; diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi index 14beb7e07323..41abc8ec474a 100644 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi @@ -12,6 +12,23 @@ * published by the Free Software Foundation. */ +#define PIN_PULL_NONE 0 +#define PIN_PULL_DOWN 1 +#define PIN_PULL_UP 3 + +#define PIN_DRV_LV1 0 +#define PIN_DRV_LV2 1 +#define PIN_DRV_LV3 2 +#define PIN_DRV_LV4 3 + +#define PIN_FUNC_INPUT 0 +#define PIN_FUNC_OUTPUT 1 +#define PIN_FUNC_SPC_2 2 +#define PIN_FUNC_SPC_3 3 +#define PIN_FUNC_SPC_4 4 +#define PIN_FUNC_SPC_5 5 +#define PIN_FUNC_SPC_F 0xf + &pinctrl_0 { gpy7: gpy7 { gpio-controller;