From patchwork Thu Sep 1 08:37:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9308555 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D8D32607D2 for ; Thu, 1 Sep 2016 08:37:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C6D0929246 for ; Thu, 1 Sep 2016 08:37:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BB7B02927E; Thu, 1 Sep 2016 08:37:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4067229246 for ; Thu, 1 Sep 2016 08:37:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752647AbcIAIhd (ORCPT ); Thu, 1 Sep 2016 04:37:33 -0400 Received: from mailout3.w1.samsung.com ([210.118.77.13]:15218 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750881AbcIAIhR (ORCPT ); Thu, 1 Sep 2016 04:37:17 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OCT004HVHA2VG40@mailout3.w1.samsung.com>; Thu, 01 Sep 2016 09:37:14 +0100 (BST) X-AuditID: cbfec7f5-f792e6d0000013f5-02-57c7e8ba1a98 Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 9B.A4.05109.AB8E7C75; Thu, 1 Sep 2016 09:37:14 +0100 (BST) Received: from AMDC2174.DIGITAL.local ([106.120.53.17]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OCT00JAAH9XVM40@eusync3.samsung.com>; Thu, 01 Sep 2016 09:37:14 +0100 (BST) From: Krzysztof Kozlowski To: javier@osg.samsung.com, Arnd Bergmann , Kukjin Kim , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 2/2] ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415 Date: Thu, 01 Sep 2016 10:37:02 +0200 Message-id: <1472719022-27226-2-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1472719022-27226-1-git-send-email-k.kozlowski@samsung.com> References: <1472719022-27226-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrCLMWRmVeSWpSXmKPExsVy+t/xq7q7XhwPN1jyWdbi76Rj7BYbZ6xn tZh/5ByrxZu3a5gsXr8wtOh//JrZ4vz5DewWmx5fY7W4vGsOm8WM8/uYHLg8fv+axOixaVUn m8fmJfUeW/rvsnv0bVnF6PF5k1wAWxSXTUpqTmZZapG+XQJXxqXVm1kL/vFVzPy3hbGBcQVP FyMnh4SAicTEZU/ZIGwxiQv31gPZXBxCAksZJb4sP8oKkhASaGSSuPUuEsRmEzCW2Lx8CViD iEAHk0THbQkQm1kgU6Jz71x2EFtYIE/i4+4VYL0sAqoSTXcegNXzCrhLfG9vYIdYJidx8thk oBoODk4BD4ne43UQq9wlnj98wDKBkXcBI8MqRtHU0uSC4qT0XCO94sTc4tK8dL3k/NxNjJCw +7qDcekxq0OMAhyMSjy8Dm+OhQuxJpYVV+YeYpTgYFYS4WV4fjxciDclsbIqtSg/vqg0J7X4 EKM0B4uSOO/MXe9DhATSE0tSs1NTC1KLYLJMHJxSDYxOv5uCplZpLRSc88Jyp9/N8p+8jF8/ 7pMPq90+a9uUB5cnsgrzzm/3dH8XIf/b9ezhrYm1b6sC7jpJ7mBe9qOKcZ/Q7m9Sd/KOrqnd dT0l9xLL+cdTRCb57LrwfOc/3iKFZzujwpYuMml64emy5G3eQecVtz7mTv0q87mGvT0w401e 5j6NfawcSizFGYmGWsxFxYkA8KDNGzcCAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The pinctrl drive strength register on exynos4415 is 2-bit wide for each pin. The pins for SD2 were configured with value of 4. The driver does not validate the value so this overflow effectively set a bit 1 in adjacent pins thus configuring them to drive strength 2x. The author's intention was probably to set drive strength of 4x. All other SD pins are configured with drive strength of 4x. Fix these with same pattern. Fixes: 9246e7ff24c5 ("ARM: dts: Add dts files for exynos4415 SoC") Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Reviewed-by: Bartlomiej Zolnierkiewicz --- arch/arm/boot/dts/exynos4415-pinctrl.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/exynos4415-pinctrl.dtsi b/arch/arm/boot/dts/exynos4415-pinctrl.dtsi index f54aee53b6ec..76cfd872ead3 100644 --- a/arch/arm/boot/dts/exynos4415-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4415-pinctrl.dtsi @@ -480,14 +480,14 @@ samsung,pins = "gpk2-0"; samsung,pin-function = ; samsung,pin-pud = ; - samsung,pin-drv = <4>; + samsung,pin-drv = ; }; sd2_cmd: sd2-cmd { samsung,pins = "gpk2-1"; samsung,pin-function = ; samsung,pin-pud = ; - samsung,pin-drv = <4>; + samsung,pin-drv = ; }; sd2_cd: sd2-cd { @@ -501,14 +501,14 @@ samsung,pins = "gpk2-3"; samsung,pin-function = ; samsung,pin-pud = ; - samsung,pin-drv = <4>; + samsung,pin-drv = ; }; sd2_bus4: sd2-bus-width4 { samsung,pins = "gpk2-4", "gpk2-5", "gpk2-6"; samsung,pin-function = ; samsung,pin-pud = ; - samsung,pin-drv = <4>; + samsung,pin-drv = ; }; cam_port_b_io: cam-port-b-io {