From patchwork Fri Nov 18 12:23:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 9436361 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5FF1E6047D for ; Fri, 18 Nov 2016 12:23:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 66D9A29883 for ; Fri, 18 Nov 2016 12:23:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5B0CA2989D; Fri, 18 Nov 2016 12:23:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B739F29885 for ; Fri, 18 Nov 2016 12:23:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752037AbcKRMXw (ORCPT ); Fri, 18 Nov 2016 07:23:52 -0500 Received: from mailout4.samsung.com ([203.254.224.34]:37114 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752903AbcKRMXq (ORCPT ); Fri, 18 Nov 2016 07:23:46 -0500 Received: from epcpsbgm1new.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OGU001M57RDQK60@mailout4.samsung.com> for linux-samsung-soc@vger.kernel.org; Fri, 18 Nov 2016 21:23:43 +0900 (KST) X-AuditID: cbfee61a-f79916d0000062de-9c-582ef2cfa420 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id F5.F6.25310.FC2FE285; Fri, 18 Nov 2016 21:23:43 +0900 (KST) Received: from AMDC2765.digital.local ([106.116.147.25]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OGU00EIW7QV1S10@mmp2.samsung.com>; Fri, 18 Nov 2016 21:23:43 +0900 (KST) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Seung-Woo Kim , Chanwoo Choi Subject: [PATCH v2 RESEND 1/3] arm64: dts: exynos: TM2 - add support for GScaler devices Date: Fri, 18 Nov 2016 13:23:11 +0100 Message-id: <1479471793-13021-2-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1479471793-13021-1-git-send-email-m.szyprowski@samsung.com> References: <1479471793-13021-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMLMWRmVeSWpSXmKPExsVy+t9jQd3zn/QiDE4uFbHYOGM9q8X1L89Z Lc6f38BuMeP8PiaLtUfuslscftPOajFj8ks2B3aPTas62Tz6tqxi9Pi8SS6AOcrNJiM1MSW1 SCE1Lzk/JTMv3VYpNMRN10JJIS8xN9VWKULXNyRISaEsMacUyDMyQAMOzgHuwUr6dgluGf+/ r2MueCBf8W/DPJYGxj2SXYycHBICJhJ975vYIWwxiQv31rN1MXJxCAnMYpR4fvQVM4Tzi1Hi 2qQfTCBVbAKGEl1vu9hAbBEBVYnPbQvYQYqYBfqZJM7M3sIIkhAWiJJYtfcGUAMHBwtQ0YRD yiBhXgEPiS9rtjJDbJOTOHlsMiuIzSngKbFn7z6wViGgms0X+pknMPIuYGRYxSiRWpBcUJyU nmuYl1quV5yYW1yal66XnJ+7iREcwM+kdjAe3OV+iFGAg1GJhzfimm6EEGtiWXFl7iFGCQ5m JRHe5R/0IoR4UxIrq1KL8uOLSnNSiw8xmgLdNZFZSjQ5HxhdeSXxhibmJubGBhbmlpYmRkri vI2zn4ULCaQnlqRmp6YWpBbB9DFxcEo1MPIpLtMPfqbOqdEpIn+PZ/0k9ba4/ps7DIx8Pkw6 uf7nTO+EFYmO87iTZp66OVe0XvxMVjDr85/8EqUzJ5VJyJ45mLDa4Xbntgk3xE98sm7t5WTR DWf6dn7Lvo5d698cWLLLNbtNZPUZrl0+C68eCvcPz5xkvHyJsPWDyqezrJVZtu35+tduaZUS S3FGoqEWc1FxIgC2Luo0dgIAAA== X-MTR: 20000000000000000@CPGS Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds device nodes for GScaler devices to Exynos5433 SoC dtsi and proper initial clock configuration to TM2 dts. Signed-off-by: Marek Szyprowski --- arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 10 ++++ arch/arm64/boot/dts/exynos/exynos5433.dtsi | 69 +++++++++++++++++++++++++++ 2 files changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts index 2569e4a..8eb59ad 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts @@ -23,6 +23,9 @@ compatible = "samsung,tm2", "samsung,exynos5433"; aliases { + gsc0 = &gsc_0; + gsc1 = &gsc_1; + gsc2 = &gsc_2; pinctrl0 = &pinctrl_alive; pinctrl1 = &pinctrl_aud; pinctrl2 = &pinctrl_cpif; @@ -186,6 +189,13 @@ <66700000>, <66700000>; }; +&cmu_gscl { + assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>, + <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>; + assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>, + <&cmu_top CLK_ACLK_GSCL_333>; +}; + &cpu0 { cpu-supply = <&buck3_reg>; }; diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 7d71827..945b250 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -805,6 +805,45 @@ reg = <0x145f0000 0x1038>; }; + gsc_0: video-scaler@13C00000 { + compatible = "samsung,exynos5433-gsc"; + reg = <0x13c00000 0x1000>; + interrupts = ; + clock-names = "pclk", "aclk", "aclk_xiu", + "aclk_gsclbend"; + clocks = <&cmu_gscl CLK_PCLK_GSCL0>, + <&cmu_gscl CLK_ACLK_GSCL0>, + <&cmu_gscl CLK_ACLK_XIU_GSCLX>, + <&cmu_gscl CLK_ACLK_GSCLBEND_333>; + iommus = <&sysmmu_gscl0>; + }; + + gsc_1: video-scaler@13C10000 { + compatible = "samsung,exynos5433-gsc"; + reg = <0x13c10000 0x1000>; + interrupts = ; + clock-names = "pclk", "aclk", "aclk_xiu", + "aclk_gsclbend"; + clocks = <&cmu_gscl CLK_PCLK_GSCL1>, + <&cmu_gscl CLK_ACLK_GSCL1>, + <&cmu_gscl CLK_ACLK_XIU_GSCLX>, + <&cmu_gscl CLK_ACLK_GSCLBEND_333>; + iommus = <&sysmmu_gscl1>; + }; + + gsc_2: video-scaler@13C20000 { + compatible = "samsung,exynos5433-gsc"; + reg = <0x13c20000 0x1000>; + interrupts = ; + clock-names = "pclk", "aclk", "aclk_xiu", + "aclk_gsclbend"; + clocks = <&cmu_gscl CLK_PCLK_GSCL2>, + <&cmu_gscl CLK_ACLK_GSCL2>, + <&cmu_gscl CLK_ACLK_XIU_GSCLX>, + <&cmu_gscl CLK_ACLK_GSCLBEND_333>; + iommus = <&sysmmu_gscl2>; + }; + sysmmu_decon0x: sysmmu@0x13a00000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13a00000 0x1000>; @@ -825,6 +864,36 @@ #iommu-cells = <0>; }; + sysmmu_gscl0: sysmmu@0x13C80000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13C80000 0x1000>; + interrupts = ; + clock-names = "aclk", "pclk"; + clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>, + <&cmu_gscl CLK_PCLK_SMMU_GSCL0>; + #iommu-cells = <0>; + }; + + sysmmu_gscl1: sysmmu@0x13C90000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13C90000 0x1000>; + interrupts = ; + clock-names = "aclk", "pclk"; + clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>, + <&cmu_gscl CLK_PCLK_SMMU_GSCL1>; + #iommu-cells = <0>; + }; + + sysmmu_gscl2: sysmmu@0x13CA0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13CA0000 0x1000>; + interrupts = ; + clock-names = "aclk", "pclk"; + clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>, + <&cmu_gscl CLK_PCLK_SMMU_GSCL2>; + #iommu-cells = <0>; + }; + serial_0: serial@14c10000 { compatible = "samsung,exynos5433-uart"; reg = <0x14c10000 0x100>;