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Mon, 16 Jan 2017 06:45:31 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20170116064528eucas1p13b12a28ae9737404d38b3f794e8c23fd~aLZEuVaIn1341013410eucas1p1L; Mon, 16 Jan 2017 06:45:28 +0000 (GMT) X-AuditID: cbfec7ef-f79d26d00000420c-b5-587c6c0b5f17 Received: from eusync2.samsung.com ( [203.254.199.212]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 88.9B.06687.04C6C785; Mon, 16 Jan 2017 06:46:24 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OJV00BS81FJUN70@eusync2.samsung.com>; Mon, 16 Jan 2017 06:45:28 +0000 (GMT) From: Marek Szyprowski To: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Linus Walleij , Tomasz Figa , Bartlomiej Zolnierkiewicz Subject: [PATCH 11/12] pinctrl: samsung: Move retention control from mach-s5pv210 to the pinctrl driver Date: Mon, 16 Jan 2017 07:45:06 +0100 Message-id: <1484549107-5957-12-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1484549107-5957-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrDIsWRmVeSWpSXmKPExsWy7djP87rcOTURBr9OGFtsnLGe1eL8+Q3s FlP+LGey2PT4GqvF5vl/GC0+9x5htJhxfh+Txdojd9ktDr9pZ7VYtesPowOXx85Zd9k9Nq3q ZPO4c20Pm8fmJfUefVtWMXp83iQXwBbFZZOSmpNZllqkb5fAlXG49ydzwR3Fisf/whsYl8t0 MXJySAiYSLy9tJANwhaTuHBvPZgtJLCMUWLtnPIuRi4g+zOjRMeiP6wwDdd7+5khEkBFR19c ZYdwGpgkHredZwGpYhMwlOh628UGkhARaGaUmHl3L1gVs0Afk8TnzXsZQaqEBTIl7m/4zAxi swioSvSc6QXr5hXwkNjevpAFYp+cxMljk8F2cwLFJ+5rZQEZJCHQzS7xaN5MoKkcQI6sxKYD zBD1LhItBz5C9QpLvDq+hR3ClpHo7DjIBGH3M0o0tWpD2DMYJc695YWwrSUOH78ItotZgE9i 0rbpzBDjeSU62oQgSjwk7vVvh1rlKPHo9zqo72czSlx/NZtxAqPMAkaGVYwiqaXFuempxYZ6 xYm5xaV56XrJ+bmbGIFxfvrf8fc7GJ82hxxiFOBgVOLhXbCjOkKINbGsuDL3EKMEB7OSCK9b Zk2EEG9KYmVValF+fFFpTmrxIUZpDhYlcd69C66ECwmkJ5akZqemFqQWwWSZODilGhhnX1m9 dJ349fOfYq56rpq4iD29zm/Fhkt6nxdKa928la6WrCm/IdXDeI/l6Z1NWxReWH9iZlupFaSn EfLtzDWGp1dSIm8HJVnqLmc273p/fKmxqJaXznruravEuhsvVq5e68l0fmrdLItdhSKfZsy6 KjDNQy/pQe6radIPY+8Kd626VxX9PrxZiaU4I9FQi7moOBEAvB0dPO8CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrLLMWRmVeSWpSXmKPExsVy+t/xK7oOOTURBh+/KVpsnLGe1eL8+Q3s FlP+LGey2PT4GqvF5vl/GC0+9x5htJhxfh+Txdojd9ktDr9pZ7VYtesPowOXx85Zd9k9Nq3q ZPO4c20Pm8fmJfUefVtWMXp83iQXwBblZpORmpiSWqSQmpecn5KZl26rFBripmuhpJCXmJtq qxSh6xsSpKRQlphTCuQZGaABB+cA92AlfbsEt4zDvT+ZC+4oVjz+F97AuFymi5GTQ0LAROJ6 bz8zhC0mceHeerYuRi4OIYEljBLPrn9jh3CamCS61k9lB6liEzCU6HrbBVYlItDMKNGwpBfM YRaYwCQx81MDE0iVsECmxP0Nn8HmsgioSvSc6WUBsXkFPCS2ty9kgdgnJ3Hy2GRWEJsTKD5x XytYXEjAXWLGq6nMExh5FzAyrGIUSS0tzk3PLTbUK07MLS7NS9dLzs/dxAgM+m3Hfm7ewXhp Y/AhRgEORiUe3h+7qiOEWBPLiitzDzFKcDArifC6ZdZECPGmJFZWpRblxxeV5qQWH2I0BTpq IrOUaHI+MCLzSuINTQzNLQ2NjC0szI2MlMR5Sz5cCRcSSE8sSc1OTS1ILYLpY+LglGpgLDDr YZQ+u/yE5NmFe85tFD5p5pZjXK0QXMu/qlNOt8TrpWt9C8OKHq/ntep+n7fVH3tefd/Xnn32 rjlVMyYysueWH6s9/tz8W8CzU2w+UsYsU3mN9xWIqBn4NwtNCvtpZHX+kmcex2pVh53iWwWl eC4dMPMV55UTmfPd6NCiY5NL97rk/dimxFKckWioxVxUnAgAmk/yf5ACAAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170116064528eucas1p13b12a28ae9737404d38b3f794e8c23fd X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170116064528eucas1p13b12a28ae9737404d38b3f794e8c23fd X-RootMTR: 20170116064528eucas1p13b12a28ae9737404d38b3f794e8c23fd References: <1484549107-5957-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch moves pad retention control from S5PV210 machine code to Exynos pin controller driver. This helps to avoid possible ordering and logical dependencies between machine and pin control code. Till now it worked fine only because sys_ops for machine code and pin controller were called in registration order. Signed-off-by: Marek Szyprowski --- arch/arm/mach-s5pv210/pm.c | 7 ---- arch/arm/mach-s5pv210/regs-clock.h | 4 --- drivers/pinctrl/samsung/pinctrl-exynos.c | 56 ++++++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c index 21b4b13c5ab7..7d69666de5ba 100644 --- a/arch/arm/mach-s5pv210/pm.c +++ b/arch/arm/mach-s5pv210/pm.c @@ -155,13 +155,6 @@ static void s5pv210_suspend_finish(void) */ static void s5pv210_pm_resume(void) { - u32 tmp; - - tmp = __raw_readl(S5P_OTHERS); - tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\ - S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART); - __raw_writel(tmp , S5P_OTHERS); - s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); } diff --git a/arch/arm/mach-s5pv210/regs-clock.h b/arch/arm/mach-s5pv210/regs-clock.h index 4640f0f03c12..fb3eb77412db 100644 --- a/arch/arm/mach-s5pv210/regs-clock.h +++ b/arch/arm/mach-s5pv210/regs-clock.h @@ -188,10 +188,6 @@ #define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) /* OTHERS Resgister */ -#define S5P_OTHERS_RET_IO (1 << 31) -#define S5P_OTHERS_RET_CF (1 << 30) -#define S5P_OTHERS_RET_MMC (1 << 29) -#define S5P_OTHERS_RET_UART (1 << 28) #define S5P_OTHERS_USB_SIG_MASK (1 << 16) /* S5P_DAC_CONTROL */ diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index 652d3eabe1e5..fdadc9cbcfce 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -643,6 +644,60 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata) exynos_pinctrl_resume_bank(drvdata, bank); } +/* Retention control for S5PV210 are located at the end of clock controller */ +#define S5P_OTHERS 0xE000 + +#define S5P_OTHERS_RET_IO (1 << 31) +#define S5P_OTHERS_RET_CF (1 << 30) +#define S5P_OTHERS_RET_MMC (1 << 29) +#define S5P_OTHERS_RET_UART (1 << 28) + +static void s5pv210_retention_off(struct samsung_pinctrl_drv_data *drvdata) +{ + void *clk_base = drvdata->retention_ctrl->priv; + u32 tmp; + + tmp = __raw_readl(clk_base + S5P_OTHERS); + tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF | S5P_OTHERS_RET_MMC | + S5P_OTHERS_RET_UART); + __raw_writel(tmp, clk_base + S5P_OTHERS); +} + +static struct samsung_retention_ctrl * +s5pv210_retention_init(struct samsung_pinctrl_drv_data *drvdata, + const struct samsung_retention_data *data) +{ + struct samsung_retention_ctrl *ctrl; + struct device_node *np; + void *clk_base; + + ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); + if (!ctrl) + return NULL; + + np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); + if (!np) { + pr_err("%s: failed to find clock controller DT node\n", + __func__); + return NULL; + } + + clk_base = of_iomap(np, 0); + if (!clk_base) { + pr_err("%s: failed to map clock registers\n", __func__); + return NULL; + } + + ctrl->priv = clk_base; + ctrl->off = s5pv210_retention_off; + + return ctrl; +} + +static const struct samsung_retention_data s5pv210_retention_data __initconst = { + .init = s5pv210_retention_init, +}; + /* pin banks of s5pv210 pin-controller */ static const struct samsung_pin_bank_data s5pv210_pin_bank[] __initconst = { EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), @@ -690,6 +745,7 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata) .eint_wkup_init = exynos_eint_wkup_init, .suspend = exynos_pinctrl_suspend, .resume = exynos_pinctrl_resume, + .retention_data = &s5pv210_retention_data, }, };