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Thu, 19 Jan 2017 13:49:09 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20170119134909eucas1p234b8a56996490c82508af4e355b9b932~bMG2QDbRA0538605386eucas1p2y; Thu, 19 Jan 2017 13:49:09 +0000 (GMT) X-AuditID: cbfec7f2-f790f6d000002555-e1-5880c3d501d9 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 55.20.10233.0D3C0885; Thu, 19 Jan 2017 13:49:04 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OK100BYG51LGB30@eusync1.samsung.com>; Thu, 19 Jan 2017 13:49:08 +0000 (GMT) From: Marek Szyprowski To: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Linus Walleij , Tomasz Figa , Bartlomiej Zolnierkiewicz Subject: [PATCH v3 10/13] pinctrl: samsung: Add infrastructure for pin-bank retention control Date: Thu, 19 Jan 2017 14:48:50 +0100 Message-id: <1484833733-16082-11-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1484833733-16082-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrDIsWRmVeSWpSXmKPExsWy7djPc7pXDzdEGHTs1LDYOGM9q8X58xvY Lab8Wc5ksenxNVaLzfP/MFp87j3CaDHj/D4mi7VH7rJbHH7TzmqxatcfRgcuj52z7rJ7bFrV yeZx59oeNo/NS+o9+rasYvT4vEkugC2KyyYlNSezLLVI3y6BK+Pgb5+CJo2KXx8XMjUwblbs YuTkkBAwkbj8+Co7hC0mceHeerYuRi4OIYGljBJ3381nhHA+M0p0bf/PCtPx5scWdojEMkaJ nSu2QbU0MEkc/z2HGaSKTcBQouttF1hCRKCZUWLm3b1gLcwCfUwSnzfvZQSpEhaIl7hx9S+Y zSKgKjHh71Kgbg4OXgFPicYT4hDr5CROHpsMtpoTKDx1ThPYUAmBbnaJpa27WUDqJQRkJTYd YIaod5FY3rIK6lRhiVfHt0A9JyNxeXI3C4TdzyjR1KoNYc9glDj3lhfCtpY4fPwiWC+zAJ/E pG3TmSHG80p0tAlBlHhI3FnyiQ3CdpSYs+kKNIjmMErMuXaYcQKjzAJGhlWMIqmlxbnpqcXG esWJucWleel6yfm5mxiBcX763/FPOxi/nrA6xCjAwajEw9tRVB8hxJpYVlyZe4hRgoNZSYTX Zm9DhBBvSmJlVWpRfnxRaU5q8SFGaQ4WJXHePQuuhAsJpCeWpGanphakFsFkmTg4pRoYWVMW VB/1rF4+LezE1F8HJ3wWu+ktfPGpailzJ/v3pSte8T5VeWm2mO+OssXPyHqdQ2/qXH8wP8md E2R9nm0K20bu0gsnPzxtWJzb5OFYdv1kQZzWJAXzhu7UG3MnrmOf9yb5uND65pqXOdvmPgra 8KantI/No+VGRaWsi77QbFt//v4nfr9uKLEUZyQaajEXFScCAH5eZXjvAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrNLMWRmVeSWpSXmKPExsVy+t/xy7oXDjdEGNxYIGaxccZ6Vovz5zew W0z5s5zJYtPja6wWm+f/YbT43HuE0WLG+X1MFmuP3GW3OPymndVi1a4/jA5cHjtn3WX32LSq k83jzrU9bB6bl9R79G1ZxejxeZNcAFuUm01GamJKapFCal5yfkpmXrqtUmiIm66FkkJeYm6q rVKErm9IkJJCWWJOKZBnZIAGHJwD3IOV9O0S3DIO/vYpaNKo+PVxIVMD42bFLkZODgkBE4k3 P7awQ9hiEhfurWcDsYUEljBKnNyQ08XIBWQ3MUmc+bMYrIhNwFCi620XG0hCRKCZUaJhSS+Y wywwgUli5qcGJpAqYYF4iRtX/zKC2CwCqhIT/i5l7mLk4OAV8JRoPCEOsU1O4uSxyawgNidQ eOqcJqjNHhJLll5kncDIu4CRYRWjSGppcW56brGRXnFibnFpXrpecn7uJkZgwG879nPLDsau d8GHGAU4GJV4eDuK6iOEWBPLiitzDzFKcDArifDa7G2IEOJNSaysSi3Kjy8qzUktPsRoCnTT RGYp0eR8YDTmlcQbmhiaWxoaGVtYmBsZKYnzTv1wJVxIID2xJDU7NbUgtQimj4mDU6qBsSHM LuijXLSlwWoNd5kZ7x2vrj6w6EwN3wL3tbcil3IxB8jfi+Zr6b2rs/aMwIG7c2NZJW9tmxg+ Tb7h3KE3z39eqv/ccfGx7jvJyuSyT1p7g+Tn/eQ+JtR5VtKlJS4s2+Osq+/a3nNlAbe9Gxu7 Xzk/uPDxgOuW9Zt3GHAJ3dx+a1/X/bmq/EosxRmJhlrMRcWJAFv0d2mOAgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170119134909eucas1p234b8a56996490c82508af4e355b9b932 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170119134909eucas1p234b8a56996490c82508af4e355b9b932 X-RootMTR: 20170119134909eucas1p234b8a56996490c82508af4e355b9b932 References: <1484833733-16082-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Pad retention control after suspend/resume cycle should be done from pin controller driver instead of PMU (power management unit) driver to avoid possible ordering and logical dependencies. Till now it worked fine only because PMU driver registered its sys_ops after pin controller. This patch adds infrastructure to handle pad retention during pin control driver resume. Signed-off-by: Marek Szyprowski Reviewed-by: Krzysztof Kozlowski Acked-by: Tomasz Figa --- drivers/pinctrl/samsung/pinctrl-samsung.c | 12 +++++++++ drivers/pinctrl/samsung/pinctrl-samsung.h | 42 +++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+) diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 59f99ea7e65b..021abd7221f8 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1060,6 +1060,13 @@ static int samsung_pinctrl_probe(struct platform_device *pdev) if (res) drvdata->irq = res->start; + if (ctrl->retention_data) { + drvdata->retention_ctrl = ctrl->retention_data->init(drvdata, + ctrl->retention_data); + if (IS_ERR(drvdata->retention_ctrl)) + return PTR_ERR(drvdata->retention_ctrl); + } + ret = samsung_gpiolib_register(pdev, drvdata); if (ret) return ret; @@ -1126,6 +1133,8 @@ static void samsung_pinctrl_suspend_dev( if (drvdata->suspend) drvdata->suspend(drvdata); + if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable) + drvdata->retention_ctrl->enable(drvdata); } /** @@ -1173,6 +1182,9 @@ static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata) if (widths[type]) writel(bank->pm_save[type], reg + offs[type]); } + + if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable) + drvdata->retention_ctrl->disable(drvdata); } /** diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index 6f7ce7539a00..515a61035e54 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -185,10 +185,48 @@ struct samsung_pin_bank { }; /** + * struct samsung_retention_data: runtime pin-bank retention control data. + * @regs: array of PMU registers to control pad retention. + * @nr_regs: number of registers in @regs array. + * @value: value to store to registers to turn off retention. + * @refcnt: atomic counter if retention control affects more than one bank. + * @priv: retention control code private data + * @enable: platform specific callback to enter retention mode. + * @disable: platform specific callback to exit retention mode. + **/ +struct samsung_retention_ctrl { + const u32 *regs; + int nr_regs; + u32 value; + atomic_t *refcnt; + void *priv; + void (*enable)(struct samsung_pinctrl_drv_data *); + void (*disable)(struct samsung_pinctrl_drv_data *); +}; + +/** + * struct samsung_retention_data: represent a pin-bank retention control data. + * @regs: array of PMU registers to control pad retention. + * @nr_regs: number of registers in @regs array. + * @value: value to store to registers to turn off retention. + * @refcnt: atomic counter if retention control affects more than one bank. + * @init: platform specific callback to initialize retention control. + **/ +struct samsung_retention_data { + const u32 *regs; + int nr_regs; + u32 value; + atomic_t *refcnt; + struct samsung_retention_ctrl *(*init)(struct samsung_pinctrl_drv_data *, + const struct samsung_retention_data *); +}; + +/** * struct samsung_pin_ctrl: represent a pin controller. * @pin_banks: list of pin banks included in this controller. * @nr_banks: number of pin banks. * @nr_ext_resources: number of the extra base address for pin banks. + * @retention_data: configuration data for retention control. * @eint_gpio_init: platform specific callback to setup the external gpio * interrupts for the controller. * @eint_wkup_init: platform specific callback to setup the external wakeup @@ -198,6 +236,7 @@ struct samsung_pin_ctrl { const struct samsung_pin_bank_data *pin_banks; u32 nr_banks; int nr_ext_resources; + const struct samsung_retention_data *retention_data; int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *); int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *); @@ -219,6 +258,7 @@ struct samsung_pin_ctrl { * @nr_function: number of such pin functions. * @pin_base: starting system wide pin number. * @nr_pins: number of pins supported by the controller. + * @retention_ctrl: retention control runtime data. */ struct samsung_pinctrl_drv_data { struct list_head node; @@ -238,6 +278,8 @@ struct samsung_pinctrl_drv_data { unsigned int pin_base; unsigned int nr_pins; + struct samsung_retention_ctrl *retention_ctrl; + void (*suspend)(struct samsung_pinctrl_drv_data *); void (*resume)(struct samsung_pinctrl_drv_data *); };